aarch64-port-dev

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aarch64-port-dev@openjdk.org

February 2016

10 participants
32 discussions

RFR: 8148783: aarch64: SEGV running SpecJBB2013
by Edward Nevill 04 Feb '16

04 Feb '16

Hi, Please review the following webrev http://cr.openjdk.java.net/~enevill/8148783/webrev.0/ JIRA Issue: https://bugs.openjdk.java.net/browse/JDK-8148783 The bug is explained in some detail in the JIRA issue. The problem is that the sign is not preserved in the following code from adrp(...) long offset = dest_page - pc_page; offset = (offset & ((1<<20)-1)) << 12; This generally works because the following movk overwrites bits 32..47 However on larger memory systems of 256 Gb it could happen that the PC address was 0x0000ffffXXXXXXXX in which case the falsely positive offset could wrap to 0x00010000XXXXXXXX Bit 48 does not get overwritten by the following movk, hence forming an invalid address. The solution is to use int32_t for offset instead of long, so it gets sign extended correctly when added to the pc(). All the best, Ed.

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RFR: 8148948: aarch64: generate_copy_longs calls align() incorrectly
by Edward Nevill 03 Feb '16

03 Feb '16

Hi, Please review the following: http://cr.openjdk.java.net/~enevill/8148948/webrev.0/ JIRA: https://bugs.openjdk.java.net/browse/JDK-8148948 The issue is that there are align statements of the form __ align(6) in generate_copy_longs() whereas the correct alignment statement should be __ align(64) In the proposed webrev I have changed the statements to __ align(CodeEntryAlignment); Howver in C1 CodeEntryAlignment is set to 16 for C1 and 64 for C2. I can see no reason why this is the case so I am proposing also changing CodeEntryAlignment to 64 for both C1 & C2. Other arches set CodeEntryAlignment as follows sparc: 32 ppc: 128 x86: 32 (c2), 16 (c1) Thanks, Ed.

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