[aarch64-port-dev ] Patch: Bulk rename brx86 -> blrt
Andrew Haley
aph at redhat.com
Wed Aug 7 09:23:43 PDT 2013
brx86 is no longer a good name for a runtime call.
Renamed everywhere.
Andrew.
comparing with ssh://aph@hg.openjdk.java.net/aarch64-port/jdk8//hotspot
searching for changes
remote: X11 forwarding request failed on channel 0
changeset: 4811:a3a743a1de8a
branch: aarch64_c2
user: aph
date: Wed Aug 07 17:20:09 2013 +0100
summary: Bulk rename brx86 -> blrt.
diff -r abf544a531f8 -r a3a743a1de8a src/cpu/aarch64/vm/assembler_aarch64.hpp
--- a/src/cpu/aarch64/vm/assembler_aarch64.hpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/cpu/aarch64/vm/assembler_aarch64.hpp Wed Aug 07 17:20:09 2013 +0100
@@ -1764,8 +1764,8 @@
return from the simulator run() call with STATUS_HALT? The linking
code will call fatal() when it sees STATUS_HALT.
- brx86 Xn, Wm
- brx86 Xn, #gpargs, #fpargs, #type
+ blrt Xn, Wm
+ blrt Xn, #gpargs, #fpargs, #type
Xn holds the 64 bit x86 branch_address
call format is encoded either as immediate data in the call
or in register Wm. In the latter case
@@ -1819,16 +1819,16 @@
10987654321098765432109876543210
PSEUDO_HALT = 0x11100000000000000000000000000000
- PSEUDO_BRX86 = 0x11000000000000000_______________
- PSEUDO_BRX86R = 0x1100000000000000100000__________
+ PSEUDO_BLRT = 0x11000000000000000_______________
+ PSEUDO_BLRTR = 0x1100000000000000100000__________
PSEUDO_NOTIFY = 0x10100000000000000_______________
- instr[31,29] = op1 : 111 ==> HALT, 110 ==> BRX86/BRX86R, 101 ==> NOTIFY
+ instr[31,29] = op1 : 111 ==> HALT, 110 ==> BLRT/BLRTR, 101 ==> NOTIFY
- for BRX86
+ for BLRT
instr[14,11] = #gpargs, instr[10,7] = #fpargs
instr[6,5] = #type, instr[4,0] = Rn
- for BRX86R
+ for BLRTR
instr[9,5] = Rm, instr[4,0] = Rn
for NOTIFY
instr[14:0] = type : 0 ==> entry, 1 ==> reentry, 2 ==> exit, 3 ==> bcstart
@@ -1847,7 +1847,7 @@
}
}
- void brx86(Register Rn, int gpargs, int fpargs, int type) {
+ void blrt(Register Rn, int gpargs, int fpargs, int type) {
if (UseBuiltinSim) {
starti;
f(0b110, 31 ,29);
@@ -1863,7 +1863,7 @@
}
}
- void brx86(Register Rn, Register Rm) {
+ void blrt(Register Rn, Register Rm) {
if (UseBuiltinSim) {
starti;
f(0b110, 31 ,29);
diff -r abf544a531f8 -r a3a743a1de8a src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Wed Aug 07 17:20:09 2013 +0100
@@ -496,7 +496,7 @@
__ adr(r0, poll);
__ str(r0, Address(rthread, JavaThread::saved_exception_pc_offset()));
__ mov(rscratch1, CAST_FROM_FN_PTR(address, SharedRuntime::get_poll_stub));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ pop(0x3ffffffc, sp); // integer registers except lr & sp & r0 & r1
__ mov(rscratch1, r0);
__ pop(0x3, sp); // r0 & r1
@@ -2126,7 +2126,7 @@
__ mov(c_rarg4, j_rarg4);
if (copyfunc_addr == NULL) { // Use C version if stub was not generated
__ mov(rscratch1, RuntimeAddress(C_entry));
- __ brx86(rscratch1, 5, 0, 1);
+ __ blrt(rscratch1, 5, 0, 1);
} else {
#ifndef PRODUCT
if (PrintC1Statistics) {
@@ -2606,7 +2606,7 @@
num_gpargs++;
}
}
- __ brx86(rscratch1, num_gpargs, num_fpargs, type);
+ __ blrt(rscratch1, num_gpargs, num_fpargs, type);
}
if (info != NULL) {
diff -r abf544a531f8 -r a3a743a1de8a src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Wed Aug 07 17:20:09 2013 +0100
@@ -61,7 +61,7 @@
// do the call
mov(rscratch1, RuntimeAddress(entry));
- brx86(rscratch1, args_size + 1, 8, 1);
+ blrt(rscratch1, args_size + 1, 8, 1);
bind(retaddr);
int call_offset = offset();
// verify callee-saved register
@@ -555,7 +555,7 @@
__ set_last_Java_frame(sp, rfp, retaddr, rscratch1);
// do the call
__ mov(rscratch1, RuntimeAddress(target));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
OopMapSet* oop_maps = new OopMapSet();
oop_maps->add_gc_map(__ offset(), oop_map);
diff -r abf544a531f8 -r a3a743a1de8a src/cpu/aarch64/vm/macroAssembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Wed Aug 07 17:20:09 2013 +0100
@@ -912,7 +912,7 @@
// We add 1 to number_of_arguments because the thread in arg0 is
// not counted
mov(rscratch1, entry_point);
- brx86(rscratch1, number_of_gp_arguments + 1, number_of_fp_arguments, type);
+ blrt(rscratch1, number_of_gp_arguments + 1, number_of_fp_arguments, type);
if (retaddr)
bind(*retaddr);
@@ -1500,7 +1500,7 @@
mov(c_rarg2, sp);
mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
// call(c_rarg3);
- brx86(c_rarg3, 3, 0, 1);
+ blrt(c_rarg3, 3, 0, 1);
hlt(0);
}
diff -r abf544a531f8 -r a3a743a1de8a src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp
--- a/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp Wed Aug 07 17:20:09 2013 +0100
@@ -317,7 +317,7 @@
__ mov(c_rarg0, rmethod);
__ mov(c_rarg1, lr);
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
- __ brx86(rscratch1, 2, 0, 0);
+ __ blrt(rscratch1, 2, 0, 0);
__ pop_CPU_state();
// restore sp
@@ -1171,8 +1171,8 @@
assert((unsigned)fpargs < 32, "eek!");
__ mov(rscratch1, RuntimeAddress(dest));
__ mov(rscratch2, (gpargs << 6) | (fpargs << 2) | type);
- __ brx86(rscratch1, rscratch2);
- // __ brx86(rscratch1, gpargs, fpargs, type);
+ __ blrt(rscratch1, rscratch2);
+ // __ blrt(rscratch1, gpargs, fpargs, type);
}
}
@@ -1970,7 +1970,7 @@
} else {
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
}
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
// Restore any method result value
restore_native_result(masm, ret_type, stack_slots);
@@ -2379,7 +2379,7 @@
#endif // ASSERT
__ mov(c_rarg0, rthread);
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
// Need to have an oopmap that tells fetch_unroll_info where to
@@ -2511,7 +2511,7 @@
__ mov(c_rarg0, rthread);
__ movw(c_rarg1, rcpool); // second arg: exec_mode
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
- __ brx86(rscratch1, 2, 0, 0);
+ __ blrt(rscratch1, 2, 0, 0);
// Set an oopmap for the call site
// Use the same PC we used for the last java frame
@@ -2595,7 +2595,7 @@
__ lea(rscratch1,
RuntimeAddress(CAST_FROM_FN_PTR(address,
Deoptimization::uncommon_trap)));
- __ brx86(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
+ __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
__ bind(retaddr);
// Set an oopmap for the call site
@@ -2708,7 +2708,7 @@
__ mov(c_rarg0, rthread);
__ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
- __ brx86(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
+ __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
// Set an oopmap for the call site
// Use the same PC we used for the last java frame
@@ -2774,7 +2774,7 @@
// Do the call
__ mov(c_rarg0, rthread);
__ lea(rscratch1, RuntimeAddress(call_ptr));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
// Set an oopmap for the call site. This oopmap will map all
@@ -2847,7 +2847,7 @@
__ mov(c_rarg0, rthread);
__ mov(rscratch1, RuntimeAddress(destination));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
}
@@ -2979,7 +2979,7 @@
__ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
__ mov(c_rarg0, rthread);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
- __ brx86(rscratch1, 1, 0, MacroAssembler::ret_type_integral);
+ __ blrt(rscratch1, 1, 0, MacroAssembler::ret_type_integral);
// Set an oopmap for the call site. This oopmap will only be used if we
// are unwinding the stack. Hence, all locations will be dead.
diff -r abf544a531f8 -r a3a743a1de8a src/cpu/aarch64/vm/stubGenerator_aarch64.cpp
--- a/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp Wed Aug 07 17:20:09 2013 +0100
@@ -773,7 +773,7 @@
#endif
BLOCK_COMMENT("call MacroAssembler::debug");
__ mov(rscratch1, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
- __ brx86(rscratch1, 3, 0, 1);
+ __ blrt(rscratch1, 3, 0, 1);
__ mov(sp, r19); // restore rsp
__ pop(0x7fffffff, sp);
__ ldr(lr, Address(sp, 0));
@@ -1278,7 +1278,7 @@
__ mov(c_rarg0, rthread);
BLOCK_COMMENT("call runtime_entry");
__ mov(rscratch1, runtime_entry);
- __ brx86(rscratch1, 3 /* number_of_arguments */, 0, 1);
+ __ blrt(rscratch1, 3 /* number_of_arguments */, 0, 1);
// Generate oop map
OopMap* map = new OopMap(framesize, 0);
diff -r abf544a531f8 -r a3a743a1de8a src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp
--- a/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp Wed Aug 07 17:20:09 2013 +0100
@@ -941,7 +941,7 @@
__ ldrw(rscratch1, Address(rmethod, Method::call_format_offset()));
// Call the native method.
- __ brx86(r10, rscratch1);
+ __ blrt(r10, rscratch1);
__ get_method(rmethod);
// result potentially in r0 or v0
@@ -998,7 +998,7 @@
//
__ mov(c_rarg0, rthread);
__ mov(rscratch2, CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans));
- __ brx86(rscratch2, 1, 0, 0);
+ __ blrt(rscratch2, 1, 0, 0);
__ get_method(rmethod);
__ reinit_heapbase();
__ bind(Continue);
@@ -1045,7 +1045,7 @@
__ pusha(); // XXX only save smashed registers
__ mov(c_rarg0, rthread);
__ mov(rscratch2, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
- __ brx86(rscratch2, 0, 0, 0);
+ __ blrt(rscratch2, 0, 0, 0);
__ popa(); // XXX only restore smashed registers
__ reinit_heapbase();
__ bind(no_reguard);
diff -r abf544a531f8 -r a3a743a1de8a src/os_cpu/linux_aarch64/vm/assembler_linux_aarch64.cpp
--- a/src/os_cpu/linux_aarch64/vm/assembler_linux_aarch64.cpp Tue Aug 06 17:57:22 2013 +0100
+++ b/src/os_cpu/linux_aarch64/vm/assembler_linux_aarch64.cpp Wed Aug 07 17:20:09 2013 +0100
@@ -51,7 +51,7 @@
push(saved_regs, sp);
mov(c_rarg0, ThreadLocalStorage::thread_index());
mov(r19, CAST_FROM_FN_PTR(address, pthread_getspecific));
- brx86(r19, 1, 0, 1);
+ blrt(r19, 1, 0, 1);
if (dst != c_rarg0) {
mov(dst, c_rarg0);
}
changeset: 4812:485594fad22e
tag: tip
parent: 4806:560f86cdf664
user: aph
date: Wed Aug 07 17:22:00 2013 +0100
summary: Bulk rename brx86 -> blrt.
diff -r 560f86cdf664 -r 485594fad22e src/cpu/aarch64/vm/assembler_aarch64.hpp
--- a/src/cpu/aarch64/vm/assembler_aarch64.hpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/cpu/aarch64/vm/assembler_aarch64.hpp Wed Aug 07 17:22:00 2013 +0100
@@ -1764,8 +1764,8 @@
return from the simulator run() call with STATUS_HALT? The linking
code will call fatal() when it sees STATUS_HALT.
- brx86 Xn, Wm
- brx86 Xn, #gpargs, #fpargs, #type
+ blrt Xn, Wm
+ blrt Xn, #gpargs, #fpargs, #type
Xn holds the 64 bit x86 branch_address
call format is encoded either as immediate data in the call
or in register Wm. In the latter case
@@ -1819,16 +1819,16 @@
10987654321098765432109876543210
PSEUDO_HALT = 0x11100000000000000000000000000000
- PSEUDO_BRX86 = 0x11000000000000000_______________
- PSEUDO_BRX86R = 0x1100000000000000100000__________
+ PSEUDO_BLRT = 0x11000000000000000_______________
+ PSEUDO_BLRTR = 0x1100000000000000100000__________
PSEUDO_NOTIFY = 0x10100000000000000_______________
- instr[31,29] = op1 : 111 ==> HALT, 110 ==> BRX86/BRX86R, 101 ==> NOTIFY
+ instr[31,29] = op1 : 111 ==> HALT, 110 ==> BLRT/BLRTR, 101 ==> NOTIFY
- for BRX86
+ for BLRT
instr[14,11] = #gpargs, instr[10,7] = #fpargs
instr[6,5] = #type, instr[4,0] = Rn
- for BRX86R
+ for BLRTR
instr[9,5] = Rm, instr[4,0] = Rn
for NOTIFY
instr[14:0] = type : 0 ==> entry, 1 ==> reentry, 2 ==> exit, 3 ==> bcstart
@@ -1847,7 +1847,7 @@
}
}
- void brx86(Register Rn, int gpargs, int fpargs, int type) {
+ void blrt(Register Rn, int gpargs, int fpargs, int type) {
if (UseBuiltinSim) {
starti;
f(0b110, 31 ,29);
@@ -1863,7 +1863,7 @@
}
}
- void brx86(Register Rn, Register Rm) {
+ void blrt(Register Rn, Register Rm) {
if (UseBuiltinSim) {
starti;
f(0b110, 31 ,29);
diff -r 560f86cdf664 -r 485594fad22e src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Wed Aug 07 17:22:00 2013 +0100
@@ -496,7 +496,7 @@
__ adr(r0, poll);
__ str(r0, Address(rthread, JavaThread::saved_exception_pc_offset()));
__ mov(rscratch1, CAST_FROM_FN_PTR(address, SharedRuntime::get_poll_stub));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ pop(0x3ffffffc, sp); // integer registers except lr & sp & r0 & r1
__ mov(rscratch1, r0);
__ pop(0x3, sp); // r0 & r1
@@ -2126,7 +2126,7 @@
__ mov(c_rarg4, j_rarg4);
if (copyfunc_addr == NULL) { // Use C version if stub was not generated
__ mov(rscratch1, RuntimeAddress(C_entry));
- __ brx86(rscratch1, 5, 0, 1);
+ __ blrt(rscratch1, 5, 0, 1);
} else {
#ifndef PRODUCT
if (PrintC1Statistics) {
@@ -2606,7 +2606,7 @@
num_gpargs++;
}
}
- __ brx86(rscratch1, num_gpargs, num_fpargs, type);
+ __ blrt(rscratch1, num_gpargs, num_fpargs, type);
}
if (info != NULL) {
diff -r 560f86cdf664 -r 485594fad22e src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Wed Aug 07 17:22:00 2013 +0100
@@ -61,7 +61,7 @@
// do the call
mov(rscratch1, RuntimeAddress(entry));
- brx86(rscratch1, args_size + 1, 8, 1);
+ blrt(rscratch1, args_size + 1, 8, 1);
bind(retaddr);
int call_offset = offset();
// verify callee-saved register
@@ -555,7 +555,7 @@
__ set_last_Java_frame(sp, rfp, retaddr, rscratch1);
// do the call
__ mov(rscratch1, RuntimeAddress(target));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
OopMapSet* oop_maps = new OopMapSet();
oop_maps->add_gc_map(__ offset(), oop_map);
diff -r 560f86cdf664 -r 485594fad22e src/cpu/aarch64/vm/macroAssembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Wed Aug 07 17:22:00 2013 +0100
@@ -912,7 +912,7 @@
// We add 1 to number_of_arguments because the thread in arg0 is
// not counted
mov(rscratch1, entry_point);
- brx86(rscratch1, number_of_gp_arguments + 1, number_of_fp_arguments, type);
+ blrt(rscratch1, number_of_gp_arguments + 1, number_of_fp_arguments, type);
if (retaddr)
bind(*retaddr);
@@ -1500,7 +1500,7 @@
mov(c_rarg2, sp);
mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
// call(c_rarg3);
- brx86(c_rarg3, 3, 0, 1);
+ blrt(c_rarg3, 3, 0, 1);
hlt(0);
}
diff -r 560f86cdf664 -r 485594fad22e src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp
--- a/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp Wed Aug 07 17:22:00 2013 +0100
@@ -317,7 +317,7 @@
__ mov(c_rarg0, rmethod);
__ mov(c_rarg1, lr);
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
- __ brx86(rscratch1, 2, 0, 0);
+ __ blrt(rscratch1, 2, 0, 0);
__ pop_CPU_state();
// restore sp
@@ -1171,8 +1171,8 @@
assert((unsigned)fpargs < 32, "eek!");
__ mov(rscratch1, RuntimeAddress(dest));
__ mov(rscratch2, (gpargs << 6) | (fpargs << 2) | type);
- __ brx86(rscratch1, rscratch2);
- // __ brx86(rscratch1, gpargs, fpargs, type);
+ __ blrt(rscratch1, rscratch2);
+ // __ blrt(rscratch1, gpargs, fpargs, type);
}
}
@@ -1970,7 +1970,7 @@
} else {
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
}
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
// Restore any method result value
restore_native_result(masm, ret_type, stack_slots);
@@ -2379,7 +2379,7 @@
#endif // ASSERT
__ mov(c_rarg0, rthread);
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
// Need to have an oopmap that tells fetch_unroll_info where to
@@ -2511,7 +2511,7 @@
__ mov(c_rarg0, rthread);
__ movw(c_rarg1, rcpool); // second arg: exec_mode
__ mov(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
- __ brx86(rscratch1, 2, 0, 0);
+ __ blrt(rscratch1, 2, 0, 0);
// Set an oopmap for the call site
// Use the same PC we used for the last java frame
@@ -2595,7 +2595,7 @@
__ lea(rscratch1,
RuntimeAddress(CAST_FROM_FN_PTR(address,
Deoptimization::uncommon_trap)));
- __ brx86(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
+ __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
__ bind(retaddr);
// Set an oopmap for the call site
@@ -2708,7 +2708,7 @@
__ mov(c_rarg0, rthread);
__ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
- __ brx86(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
+ __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral);
// Set an oopmap for the call site
// Use the same PC we used for the last java frame
@@ -2774,7 +2774,7 @@
// Do the call
__ mov(c_rarg0, rthread);
__ lea(rscratch1, RuntimeAddress(call_ptr));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
// Set an oopmap for the call site. This oopmap will map all
@@ -2847,7 +2847,7 @@
__ mov(c_rarg0, rthread);
__ mov(rscratch1, RuntimeAddress(destination));
- __ brx86(rscratch1, 1, 0, 1);
+ __ blrt(rscratch1, 1, 0, 1);
__ bind(retaddr);
}
@@ -2980,7 +2980,7 @@
__ set_last_Java_frame(noreg, noreg, the_pc, rscratch1);
__ mov(c_rarg0, rthread);
__ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
- __ brx86(rscratch1, 1, 0, MacroAssembler::ret_type_integral);
+ __ blrt(rscratch1, 1, 0, MacroAssembler::ret_type_integral);
// Set an oopmap for the call site. This oopmap will only be used if we
// are unwinding the stack. Hence, all locations will be dead.
diff -r 560f86cdf664 -r 485594fad22e src/cpu/aarch64/vm/stubGenerator_aarch64.cpp
--- a/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp Wed Aug 07 17:22:00 2013 +0100
@@ -773,7 +773,7 @@
#endif
BLOCK_COMMENT("call MacroAssembler::debug");
__ mov(rscratch1, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
- __ brx86(rscratch1, 3, 0, 1);
+ __ blrt(rscratch1, 3, 0, 1);
__ mov(sp, r19); // restore rsp
__ pop(0x7fffffff, sp);
__ ldr(lr, Address(sp, 0));
@@ -1278,7 +1278,7 @@
__ mov(c_rarg0, rthread);
BLOCK_COMMENT("call runtime_entry");
__ mov(rscratch1, runtime_entry);
- __ brx86(rscratch1, 3 /* number_of_arguments */, 0, 1);
+ __ blrt(rscratch1, 3 /* number_of_arguments */, 0, 1);
// Generate oop map
OopMap* map = new OopMap(framesize, 0);
diff -r 560f86cdf664 -r 485594fad22e src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp
--- a/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp Wed Aug 07 17:22:00 2013 +0100
@@ -941,7 +941,7 @@
__ ldrw(rscratch1, Address(rmethod, Method::call_format_offset()));
// Call the native method.
- __ brx86(r10, rscratch1);
+ __ blrt(r10, rscratch1);
__ get_method(rmethod);
// result potentially in r0 or v0
@@ -998,7 +998,7 @@
//
__ mov(c_rarg0, rthread);
__ mov(rscratch2, CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans));
- __ brx86(rscratch2, 1, 0, 0);
+ __ blrt(rscratch2, 1, 0, 0);
__ get_method(rmethod);
__ reinit_heapbase();
__ bind(Continue);
@@ -1045,7 +1045,7 @@
__ pusha(); // XXX only save smashed registers
__ mov(c_rarg0, rthread);
__ mov(rscratch2, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
- __ brx86(rscratch2, 0, 0, 0);
+ __ blrt(rscratch2, 0, 0, 0);
__ popa(); // XXX only restore smashed registers
__ reinit_heapbase();
__ bind(no_reguard);
diff -r 560f86cdf664 -r 485594fad22e src/os_cpu/linux_aarch64/vm/assembler_linux_aarch64.cpp
--- a/src/os_cpu/linux_aarch64/vm/assembler_linux_aarch64.cpp Mon Aug 05 16:03:11 2013 +0100
+++ b/src/os_cpu/linux_aarch64/vm/assembler_linux_aarch64.cpp Wed Aug 07 17:22:00 2013 +0100
@@ -51,7 +51,7 @@
push(saved_regs, sp);
mov(c_rarg0, ThreadLocalStorage::thread_index());
mov(r19, CAST_FROM_FN_PTR(address, pthread_getspecific));
- brx86(r19, 1, 0, 1);
+ blrt(r19, 1, 0, 1);
if (dst != c_rarg0) {
mov(dst, c_rarg0);
}
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