[aarch64-port-dev ] Patch: Handle volatile floats and doubles.

Andrew Haley aph at redhat.com
Mon Jul 8 10:52:01 PDT 2013


jcstress discovered its first bug.  :-)

Andrew.


changeset:   4720:f6fedd28ae17
tag:         tip
user:        aph
date:        Mon Jul 08 18:50:32 2013 +0100
summary:     Handle volatile floats and doubles.

diff -r 6d8077171e42 -r f6fedd28ae17 src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp	Mon Jul 08 12:01:07 2013 +0100
+++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp	Mon Jul 08 18:50:32 2013 +0100
@@ -161,6 +161,10 @@
   return op->is_double_cpu() ? op->as_register_lo() : op->as_register();
 }

+static bool is_reg(LIR_Opr op) {
+  return op->is_double_cpu() | op->is_single_cpu();
+}
+
 Address LIR_Assembler::as_Address(LIR_Address* addr, Register tmp) {
   Register base = addr->base()->as_pointer_register();
   LIR_Opr opr = addr->index();
@@ -2492,14 +2496,23 @@
 void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info) {
   if (dest->is_address()) {
       LIR_Address* to_addr = dest->as_address_ptr();
-      Register compressed_src = as_reg(src);
-      if (type == T_ARRAY || type == T_OBJECT) {
-	__ verify_oop(src->as_register());
-	if (UseCompressedOops) {
-	  compressed_src = rscratch2;
-	  __ mov(compressed_src, src->as_register());
-	  __ encode_heap_oop(compressed_src);
-	}
+      Register compressed_src = noreg;
+      if (is_reg(src)) {
+	  compressed_src = as_reg(src);
+	  if (type == T_ARRAY || type == T_OBJECT) {
+	    __ verify_oop(src->as_register());
+	    if (UseCompressedOops) {
+	      compressed_src = rscratch2;
+	      __ mov(compressed_src, src->as_register());
+	      __ encode_heap_oop(compressed_src);
+	    }
+	  }
+      } else if (src->is_single_fpu()) {
+	__ fmovs(rscratch2, src->as_float_reg());
+	src = FrameMap::rscratch2_opr,	type = T_INT;
+      } else if (src->is_double_fpu()) {
+	__ fmovd(rscratch2, src->as_double_reg());
+	src = FrameMap::rscratch2_long_opr, type = T_LONG;
       }

       if (dest->is_double_cpu())
@@ -2556,13 +2569,16 @@
       }
   } else if (src->is_address()) {
     LIR_Address* from_addr = src->as_address_ptr();
-    Register compressed_dest = as_reg(dest);
-    if (type == T_ARRAY || type == T_OBJECT) {
-      __ verify_oop(dest->as_register());
-      if (UseCompressedOops) {
-	compressed_dest = rscratch2;
-	__ mov(compressed_dest, as_reg(dest));
-	__ encode_heap_oop(compressed_dest);
+    Register compressed_dest = noreg;
+    if (is_reg(dest)) {
+      compressed_dest = as_reg(dest);
+      if (type == T_ARRAY || type == T_OBJECT) {
+	__ verify_oop(dest->as_register());
+	if (UseCompressedOops) {
+	  compressed_dest = rscratch2;
+	  __ mov(compressed_dest, as_reg(dest));
+	  __ encode_heap_oop(compressed_dest);
+	}
       }
     }

@@ -2603,6 +2619,16 @@
       __ ldarw(dest->as_register(), rscratch1);
       break;

+    case T_FLOAT:
+      __ ldarw(rscratch2, rscratch1);
+      __ fmovs(dest->as_float_reg(), rscratch2);
+      break;
+
+    case T_DOUBLE:
+      __ ldar(rscratch2, rscratch1);
+      __ fmovd(dest->as_double_reg(), rscratch2);
+      break;
+
     default:
       ShouldNotReachHere();
     }




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