[aarch64-port-dev ] C1 Patch: fix tableswitch

[Edward Nevill]

On Mon, 2013-07-22 at 13:17 +0100, Andrew Haley wrote:
> Running some tests reveals that we are generating execrable code for
> tableswitch:
> 
>  36: tableswitch low=0, high=255, default=6
>          0: 1076
>          1: 1423
>          2: 1606
>          ...
> 
> [2052]   0x00007fffee58fb7c: cmp	w4, #0x0
> [2052]   ;;  106 branch [EQ] [B4]
>   0x00007fffee58fb80: b.eq	0x00007fffee5a0cd0
> [2052]   0x00007fffee58fb84: cmp	w4, #0x1
> [2052]   ;;  110 branch [EQ] [B5]
>   0x00007fffee58fb88: b.eq	0x00007fffee5a0bd4
> [2052]   0x00007fffee58fb8c: cmp	w4, #0x2
> [2052]   ;;  114 branch [EQ] [B6]
>   0x00007fffee58fb90: b.eq	0x00007fffee5a0acc
> ... ad nauseam

Hi Andrew,

This looks fine. I don't think it is possible to do much better easily. If I read it correctly, you are doing a sequence of compares up to 5 or 6 elements, then reverting to a block style as above. It would be possible to do better using a binary comparison for switches with ~6 to 16 elements, but maybe that is not appropriate for C1. I certainly think it is appropriate to have some sort of tableswitch optimisation in C1, the previous code was dreadful. Does it do the same think on 32 bit (client) x86?

Please push this and I will run some tests.

PS: Another day, another mailer. How is it now?

All the best,
Ed.