[aarch64-port-dev ] Problematic frame: ~BufferBlob::InlineCacheBuffer
Cao Hoang Thu
thuhc at yahoo.com
Sat Sep 7 03:37:52 PDT 2013
Hi Edward,
Yes, all ok, don't crash..... except pending on test-case startup.compiler.sunflow (SPECjvm2008)
--- --- --- --- --- --- --- --- ---
Benchmark: startup.compiler.sunflow
Run mode: static run
Test type: single
Threads: 1
Iterations: 1
Run length: 1 operation
Iteration 1 (1 operation) begins: Sat Sep 07 10:34:58 GMT 2013
Regards,
Thu Cao
________________________________
From: Edward Nevill <edward.nevill at linaro.org>
To: aarch64-port-dev at openjdk.java.net
Cc: thuhc at yahoo.com; patches at linaro.org
Sent: Friday, September 6, 2013 8:54 PM
Subject: Re: [aarch64-port-dev ] Problematic frame: ~BufferBlob::InlineCacheBuffer
On Thu, 2013-09-05 at 20:02 -0700, Cao Hoang Thu wrote:
> I only run test SPECjvm2008, it always happen this issue
>
> #
> # A fatal error has been detected by the Java Runtime Environment:
> #
> # SIGILL (0x4) at pc=0x0000007f720b3120, pid=1798, tid=547509223952
> #
> # JRE version: OpenJDK Runtime Environment (8.0) (build 1.8.0-internal-thcao_2013_09_05_09_35-b00)
> # Java VM: OpenJDK 64-Bit Client VM (25.0-b22 mixed mode linux-aarch64 )
> # Problematic frame:
> # v ~BufferBlob::InlineCacheBuffer
> #
Dear Cao Hoang Thu,
I have managed to replicate this problem, but only when using the RTSM model which models the I cache and D cache behaviour rather than the foundation model.
The patch below should fix this problem.
Ed.
--- CUT HERE ---
exporting patch:
# HG changeset patch
# User Edward Nevill edward.nevill at linaro.org
# Date 1378474791 -3600
# Fri Sep 06 14:39:51 2013 +0100
# Node ID 49648b3f8a17289d275a5291cb7364ca89261310
# Parent 6cb0224e9626d3767fe96bd05b55fda2a350b17e
Fix ICache flusing problem found in RTSM
diff -r 6cb0224e9626 -r 49648b3f8a17 src/cpu/aarch64/vm/icBuffer_aarch64.cpp
--- a/src/cpu/aarch64/vm/icBuffer_aarch64.cpp Thu Sep 05 18:16:19 2013 +0100
+++ b/src/cpu/aarch64/vm/icBuffer_aarch64.cpp Fri Sep 06 14:39:51 2013 +0100
@@ -55,6 +55,8 @@
masm->b(ExternalAddress(entry_point));
masm->bind(l);
masm->emit_int64((int64_t)cached_value);
+ // Only need to invalidate the 1st two instructions - not the whole ic stub
+ ICache::invalidate_range(code_begin, NativeInstruction::instruction_size * 2);
0;
}
--- CUT HERE ---
More information about the aarch64-port-dev
mailing list