[aarch64-port-dev ] RFR: Minor optimisation for divide by 2

[Andrew Haley]

On 04/29/2014 10:16 AM, Edward Nevill wrote:

> C2 currently generates
> 
> mov rdst, rsrc, asr #31
> mov rdst, rdst, lsr #31
> add rdst, rsrc, rdst
> mov rdst, rdst, asr #1
> 
> for divide by 2. The following patch reduces this to
> 
> add rdst, rsrc, rsrc, lsr #31
> mov rdst, rdst, asr #1
> 
> I know this is very minor, but it offends me:-)
> 
> OK?

How strange.  That must be a generic C2 bug, but OK.

I'm a bit mystified why the add and shift operation isn't being
combined.  It should match AddI_reg_URShift_reg.

Andrew.