[aarch64-port-dev ] Weird thing in c1 compiler code

[Andrew Haley]

On 07/08/14 16:15, Andrew Dinn wrote:
> Can anyone explain why the code at c1_LIRAssembler.cpp:784 looks like this
> 
> void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type,
> bool pop_fpu_stack) {
>   if (src->is_single_cpu()) {
>     if (type == T_ARRAY || type == T_OBJECT) {
>       __ str(src->as_register(),
> frame_map()->address_for_slot(dest->single_stack_ix()));
>       __ verify_oop(src->as_register());
>     } else if (type == T_METADATA || type == T_DOUBLE) {
>       __ str(src->as_register(),
> frame_map()->address_for_slot(dest->single_stack_ix()));
>     } else {
>       __ strw(src->as_register(),
> frame_map()->address_for_slot(dest->single_stack_ix()));
>     }
> 
>   } else if (src->is_double_cpu()) {
>   . . .
> 
> Specifically, why is the else if branch testing for T_DOUBLE?

It shouldn't be: AFAICS that case is unreachable.

Andrew.