[aarch64-port-dev ] openjdk atomics

[Andrew Haley]

OK?

Andrew.


diff -r 9358a801c67a src/cpu/aarch64/vm/aarch64.ad
--- a/src/cpu/aarch64/vm/aarch64.ad     Fri Feb 14 16:25:23 2014 +0000
+++ b/src/cpu/aarch64/vm/aarch64.ad     Tue Feb 18 16:09:50 2014 +0000
@@ -2414,13 +2414,8 @@
     __ ldxr(rscratch1, addr_reg);
     __ cmp(rscratch1, old_reg);
     __ br(Assembler::NE, done);
-    // if we store+flush with no intervening write tmp will be zero
     __ stxr(rscratch1, new_reg, addr_reg);
-    __ cmpw(rscratch1, zr);       // cannot use cbzw as must set flag
-    __ br(Assembler::EQ, done);
-    // retry so we only ever return after a load fails to compare
-    // ensures we don't return a stale value after a failed write.
-    __ b(retry_load);
+    __ cbnzw(rscratch1, retry_load);
     __ bind(done);
     __ membar(__ AnyAny);
   %}
@@ -2460,13 +2455,8 @@
     __ ldxrw(rscratch1, addr_reg);
     __ cmpw(rscratch1, old_reg);
     __ br(Assembler::NE, done);
-    // if we store+flush with no intervening write tmp wil be zero
     __ stxrw(rscratch1, new_reg, addr_reg);
-    __ cmpw(rscratch1, zr);       // cannot use cbzw as must set flag
-    __ br(Assembler::EQ, done);
-    // retry so we only ever return after a load fails to compare
-    // ensures we don't return a stale value after a failed write.
-    __ b(retry_load);
+    __ cbnzw(rscratch1, retry_load);
     __ bind(done);
     __ membar(__ AnyAny);
   %}
diff -r 9358a801c67a src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp    Fri Feb 14 16:25:23 2014 +0000
+++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp    Tue Feb 18 16:09:50 2014 +0000
@@ -1579,8 +1579,8 @@
   Label retry_load, nope;
   // flush and load exclusive from the memory location
   // and fail if it is not what we expect
+  __ membar(__ AnyAny);
   __ bind(retry_load);
-  __ membar(__ AnyAny);
   __ ldxrw(rscratch1, addr);
   __ cmpw(rscratch1, cmpval);
   __ cset(rscratch1, Assembler::NE);