[aarch64-port-dev ] RFR: Add support for MathExact intrinsics
Edward Nevill
edward.nevill at linaro.org
Thu Jul 3 11:39:29 UTC 2014
Hi,
The following patches add support for MathExact intrinsics. I have not added support for MultiplyExact because the multiply instruction on aarch64 doesn't seem to have any option to set the flags?
The patch also involves a change to the jtreg test suite which assumes that MatchExact intrinsics are only implemented on x86.
I have excluded the MultiplyExact tests above.
Tested with hotspot jtreg, same set of failures as before.
Regards,
Ed.
--- CUT HERE ---
# HG changeset patch
# User Edward Nevill edward.nevill at linaro.org
# Date 1404386909 -3600
# Thu Jul 03 12:28:29 2014 +0100
# Node ID 2fbf9ae134d996f32cd81858037a2837b9822007
# Parent 6f6401730e4d350fad0f968c3116df0ada2c009f
Add support for MathExact intrinsics
diff -r 6f6401730e4d -r 2fbf9ae134d9 src/cpu/aarch64/vm/aarch64.ad
--- a/src/cpu/aarch64/vm/aarch64.ad Tue Jul 01 16:29:03 2014 +0100
+++ b/src/cpu/aarch64/vm/aarch64.ad Thu Jul 03 12:28:29 2014 +0100
@@ -10404,6 +10404,139 @@
%}
// ============================================================================
+// Overflow Math Instructions
+
+instruct overflowAddI_reg_reg(rFlagsReg cr, iRegI op1, iRegI op2)
+%{
+ match(Set cr (OverflowAddI op1 op2));
+
+ format %{ "cmnw $op1, $op2\t# overflow check int" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmnw($op1$$Register, $op2$$Register);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowAddI_reg_imm(rFlagsReg cr, iRegI op1, immIAddSub op2)
+%{
+ match(Set cr (OverflowAddI op1 op2));
+
+ format %{ "cmnw $op1, $op2\t# overflow check int" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmnw($op1$$Register, $op2$$constant);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowAddL_reg_reg(rFlagsReg cr, iRegL op1, iRegL op2)
+%{
+ match(Set cr (OverflowAddL op1 op2));
+
+ format %{ "cmn $op1, $op2\t# overflow check long" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmn($op1$$Register, $op2$$Register);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowAddL_reg_imm(rFlagsReg cr, iRegL op1, immLAddSub op2)
+%{
+ match(Set cr (OverflowAddL op1 op2));
+
+ format %{ "cmn $op1, $op2\t# overflow check long" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmn($op1$$Register, $op2$$constant);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowSubI_reg_reg(rFlagsReg cr, iRegI op1, iRegI op2)
+%{
+ match(Set cr (OverflowSubI op1 op2));
+
+ format %{ "cmpw $op1, $op2\t# overflow check int" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmpw($op1$$Register, $op2$$Register);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowSubI_reg_imm(rFlagsReg cr, iRegI op1, immIAddSub op2)
+%{
+ match(Set cr (OverflowSubI op1 op2));
+
+ format %{ "cmpw $op1, $op2\t# overflow check int" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmpw($op1$$Register, $op2$$constant);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowSubL_reg_reg(rFlagsReg cr, iRegL op1, iRegL op2)
+%{
+ match(Set cr (OverflowSubL op1 op2));
+
+ format %{ "cmp $op1, $op2\t# overflow check long" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmp($op1$$Register, $op2$$Register);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowSubL_reg_imm(rFlagsReg cr, iRegL op1, immLAddSub op2)
+%{
+ match(Set cr (OverflowSubL op1 op2));
+
+ format %{ "cmp $op1, $op2\t# overflow check long" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmp($op1$$Register, $op2$$constant);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowNegI_reg(rFlagsReg cr, immI0 zero, iRegI op2)
+%{
+ match(Set cr (OverflowSubI zero op2));
+
+ format %{ "cmpw zr, $op2\t# overflow check int" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmpw(zr, $op2$$Register);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+instruct overflowNegL_reg(rFlagsReg cr, immI0 zero, iRegL op2)
+%{
+ match(Set cr (OverflowSubL zero op2));
+
+ format %{ "cmp zr, $op2\t# overflow check long" %}
+ ins_cost(INSN_COST);
+ ins_encode %{
+ __ cmp(zr, $op2$$Register);
+ %}
+
+ ins_pipe(pipe_class_default);
+%}
+
+// ============================================================================
// Compare Instructions
instruct compI_reg_reg(rFlagsReg cr, iRegI op1, iRegI op2)
diff -r 6f6401730e4d -r 2fbf9ae134d9 test/compiler/intrinsics/mathexact/sanity/IntrinsicBase.java
--- a/test/compiler/intrinsics/mathexact/sanity/IntrinsicBase.java Tue Jul 01 16:29:03 2014 +0100
+++ b/test/compiler/intrinsics/mathexact/sanity/IntrinsicBase.java Thu Jul 03 12:28:29 2014 +0100
@@ -128,7 +128,7 @@
@Override
protected boolean isIntrinsicSupported() {
- return isServerVM() && Boolean.valueOf(useMathExactIntrinsics) && (Platform.isX86() || Platform.isX64());
+ return isServerVM() && Boolean.valueOf(useMathExactIntrinsics) && (Platform.isX86() || Platform.isX64() || Platform.isAArch64());
}
@Override
@@ -144,7 +144,7 @@
@Override
protected boolean isIntrinsicSupported() {
- return isServerVM() && Boolean.valueOf(useMathExactIntrinsics) && Platform.isX64();
+ return isServerVM() && Boolean.valueOf(useMathExactIntrinsics) && (Platform.isX64() || Platform.isAArch64());
}
@Override
diff -r 6f6401730e4d -r 2fbf9ae134d9 test/testlibrary/com/oracle/java/testlibrary/Platform.java
--- a/test/testlibrary/com/oracle/java/testlibrary/Platform.java Tue Jul 01 16:29:03 2014 +0100
+++ b/test/testlibrary/com/oracle/java/testlibrary/Platform.java Thu Jul 03 12:28:29 2014 +0100
@@ -113,6 +113,10 @@
return (isArch("amd64") || isArch("x86_64"));
}
+ public static boolean isAArch64() {
+ return isArch("aarch64");
+ }
+
private static boolean isArch(String archname) {
return osArch.toLowerCase().startsWith(archname.toLowerCase());
}
--- CUT HERE ---
--- CUT HERE ---
# HG changeset patch
# User Edward Nevill edward.nevill at linaro.org
# Date 1404387023 -3600
# Thu Jul 03 12:30:23 2014 +0100
# Node ID c8c1eaa0c017c9c1d90dc10ea1b7904b4deff995
# Parent 9e42859353cb54f866580d035fae58dbc02a763e
Exclude MultiplyExact tests
diff -r 9e42859353cb -r c8c1eaa0c017 test/exclude_aarch64.txt
--- a/test/exclude_aarch64.txt Fri Jun 27 21:39:47 2014 +0100
+++ b/test/exclude_aarch64.txt Thu Jul 03 12:30:23 2014 +0100
@@ -16,3 +16,9 @@
# This test is bogus. It issues a jmap with the -F options which is not
# supported in JDK8.
serviceability/sa/jmap-hashcode/Test8028623.java generic-all
+#---------------------------------------------------------------------
+# These tests fail because when we enable UseMathExactIntrinsics the test
+# suite assumes are all methods are implemented. However we do not implement
+# multiply because aarch64 does not set the flags on multiply.
+compiler/intrinsics/mathexact/sanity/MultiplyExactIntTest.java generic-all
+compiler/intrinsics/mathexact/sanity/MultiplyExactLongTest.java generic-all
--- CUT HERE ---
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