From openjdk-testing at linaro.org Sat Mar 1 04:50:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sat, 1 Mar 2014 12:50:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140301125017.5C36425E41@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/060/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/feb/23 pass: 410; fail: 4; error: 2 Build 1: aarch64/2014/feb/24 pass: 410; fail: 4; error: 2 Build 2: aarch64/2014/feb/25 pass: 410; fail: 4; error: 2 Build 3: aarch64/2014/feb/26 pass: 410; fail: 4; error: 2 Build 4: aarch64/2014/feb/27 pass: 410; fail: 4; error: 2 Build 5: aarch64/2014/feb/28 pass: 402; fail: 13; error: 1 Build 6: aarch64/2014/mar/01 pass: 402; fail: 12; error: 2 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/feb/23 pass: 2,941; error: 31 Build 1: aarch64/2014/feb/24 pass: 2,941; error: 31 Build 2: aarch64/2014/feb/25 pass: 2,940; error: 32 Build 3: aarch64/2014/feb/26 pass: 2,941; error: 31 Build 4: aarch64/2014/feb/27 pass: 2,939; error: 33 Build 5: aarch64/2014/feb/28 pass: 2,944; error: 28 Build 6: aarch64/2014/mar/01 pass: 2,944; error: 28 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/feb/23 pass: 5,255; fail: 142; error: 46 Build 1: aarch64/2014/feb/24 pass: 5,258; fail: 140; error: 45 Build 2: aarch64/2014/feb/25 pass: 5,256; fail: 141; error: 45 Build 3: aarch64/2014/feb/26 pass: 5,258; fail: 140; error: 44 Build 4: aarch64/2014/feb/27 pass: 5,260; fail: 138; error: 44 Build 5: aarch64/2014/feb/28 pass: 5,256; fail: 139; error: 47 Build 6: aarch64/2014/mar/01 pass: 5,259; fail: 137; error: 46 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Sat Mar 1 04:50:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sat, 1 Mar 2014 12:50:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140301125017.BE0521F8EC@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/060/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/feb/23 pass: 411; fail: 3; error: 2 Build 1: aarch64/2014/feb/24 pass: 412; fail: 3; error: 1 Build 2: aarch64/2014/feb/25 pass: 411; fail: 3; error: 2 Build 3: aarch64/2014/feb/26 pass: 411; fail: 3; error: 2 Build 4: aarch64/2014/feb/27 pass: 411; fail: 3; error: 2 Build 5: aarch64/2014/feb/28 pass: 404; fail: 11; error: 1 Build 6: aarch64/2014/mar/01 pass: 405; fail: 10; error: 1 2 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/feb/23 pass: 2,940; error: 32 Build 1: aarch64/2014/feb/24 pass: 2,939; error: 33 Build 2: aarch64/2014/feb/25 pass: 2,938; error: 34 Build 3: aarch64/2014/feb/26 pass: 2,938; error: 34 Build 4: aarch64/2014/feb/27 pass: 2,939; error: 33 Build 5: aarch64/2014/feb/28 pass: 2,940; error: 32 Build 6: aarch64/2014/mar/01 pass: 2,939; error: 33 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/feb/23 pass: 5,268; fail: 137; error: 38 Build 1: aarch64/2014/feb/24 pass: 5,265; fail: 140; error: 38 Build 2: aarch64/2014/feb/25 pass: 5,266; fail: 137; error: 39 Build 3: aarch64/2014/feb/26 pass: 5,269; fail: 135; error: 38 Build 4: aarch64/2014/feb/27 pass: 5,267; fail: 136; error: 39 Build 5: aarch64/2014/feb/28 pass: 5,260; fail: 141; error: 41 Build 6: aarch64/2014/mar/01 pass: 5,261; fail: 141; error: 40 3 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Sun Mar 2 04:50:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sun, 2 Mar 2014 12:50:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140302125017.621331F901@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/061/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/feb/24 pass: 412; fail: 3; error: 1 Build 1: aarch64/2014/feb/25 pass: 411; fail: 3; error: 2 Build 2: aarch64/2014/feb/26 pass: 411; fail: 3; error: 2 Build 3: aarch64/2014/feb/27 pass: 411; fail: 3; error: 2 Build 4: aarch64/2014/feb/28 pass: 404; fail: 11; error: 1 Build 5: aarch64/2014/mar/01 pass: 405; fail: 10; error: 1 Build 6: aarch64/2014/mar/02 pass: 404; fail: 11; error: 1 2 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/feb/24 pass: 2,939; error: 33 Build 1: aarch64/2014/feb/25 pass: 2,938; error: 34 Build 2: aarch64/2014/feb/26 pass: 2,938; error: 34 Build 3: aarch64/2014/feb/27 pass: 2,939; error: 33 Build 4: aarch64/2014/feb/28 pass: 2,940; error: 32 Build 5: aarch64/2014/mar/01 pass: 2,939; error: 33 Build 6: aarch64/2014/mar/02 pass: 2,939; error: 33 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/feb/24 pass: 5,265; fail: 140; error: 38 Build 1: aarch64/2014/feb/25 pass: 5,266; fail: 137; error: 39 Build 2: aarch64/2014/feb/26 pass: 5,269; fail: 135; error: 38 Build 3: aarch64/2014/feb/27 pass: 5,267; fail: 136; error: 39 Build 4: aarch64/2014/feb/28 pass: 5,260; fail: 141; error: 41 Build 5: aarch64/2014/mar/01 pass: 5,261; fail: 141; error: 40 Build 6: aarch64/2014/mar/02 pass: 5,262; fail: 140; error: 40 2 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Sun Mar 2 04:50:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sun, 2 Mar 2014 12:50:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140302125017.03BE127081@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/061/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/feb/24 pass: 410; fail: 4; error: 2 Build 1: aarch64/2014/feb/25 pass: 410; fail: 4; error: 2 Build 2: aarch64/2014/feb/26 pass: 410; fail: 4; error: 2 Build 3: aarch64/2014/feb/27 pass: 410; fail: 4; error: 2 Build 4: aarch64/2014/feb/28 pass: 402; fail: 13; error: 1 Build 5: aarch64/2014/mar/01 pass: 402; fail: 12; error: 2 Build 6: aarch64/2014/mar/02 pass: 403; fail: 12; error: 1 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/feb/24 pass: 2,941; error: 31 Build 1: aarch64/2014/feb/25 pass: 2,940; error: 32 Build 2: aarch64/2014/feb/26 pass: 2,941; error: 31 Build 3: aarch64/2014/feb/27 pass: 2,939; error: 33 Build 4: aarch64/2014/feb/28 pass: 2,944; error: 28 Build 5: aarch64/2014/mar/01 pass: 2,944; error: 28 Build 6: aarch64/2014/mar/02 pass: 2,944; error: 28 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/feb/24 pass: 5,258; fail: 140; error: 45 Build 1: aarch64/2014/feb/25 pass: 5,256; fail: 141; error: 45 Build 2: aarch64/2014/feb/26 pass: 5,258; fail: 140; error: 44 Build 3: aarch64/2014/feb/27 pass: 5,260; fail: 138; error: 44 Build 4: aarch64/2014/feb/28 pass: 5,256; fail: 139; error: 47 Build 5: aarch64/2014/mar/01 pass: 5,259; fail: 137; error: 46 Build 6: aarch64/2014/mar/02 pass: 5,255; fail: 140; error: 47 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Mon Mar 3 04:50:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Mon, 3 Mar 2014 12:50:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140303125017.E5E89270CD@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/062/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/feb/25 pass: 410; fail: 4; error: 2 Build 1: aarch64/2014/feb/26 pass: 410; fail: 4; error: 2 Build 2: aarch64/2014/feb/27 pass: 410; fail: 4; error: 2 Build 3: aarch64/2014/feb/28 pass: 402; fail: 13; error: 1 Build 4: aarch64/2014/mar/01 pass: 402; fail: 12; error: 2 Build 5: aarch64/2014/mar/02 pass: 403; fail: 12; error: 1 Build 6: aarch64/2014/mar/03 pass: 402; fail: 12; error: 2 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/feb/25 pass: 2,940; error: 32 Build 1: aarch64/2014/feb/26 pass: 2,941; error: 31 Build 2: aarch64/2014/feb/27 pass: 2,939; error: 33 Build 3: aarch64/2014/feb/28 pass: 2,944; error: 28 Build 4: aarch64/2014/mar/01 pass: 2,944; error: 28 Build 5: aarch64/2014/mar/02 pass: 2,944; error: 28 Build 6: aarch64/2014/mar/03 pass: 2,944; error: 28 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/feb/25 pass: 5,256; fail: 141; error: 45 Build 1: aarch64/2014/feb/26 pass: 5,258; fail: 140; error: 44 Build 2: aarch64/2014/feb/27 pass: 5,260; fail: 138; error: 44 Build 3: aarch64/2014/feb/28 pass: 5,256; fail: 139; error: 47 Build 4: aarch64/2014/mar/01 pass: 5,259; fail: 137; error: 46 Build 5: aarch64/2014/mar/02 pass: 5,255; fail: 140; error: 47 Build 6: aarch64/2014/mar/03 pass: 5,257; fail: 139; error: 46 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Mon Mar 3 04:50:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Mon, 3 Mar 2014 12:50:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140303125018.1293F25E80@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/062/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/feb/25 pass: 411; fail: 3; error: 2 Build 1: aarch64/2014/feb/26 pass: 411; fail: 3; error: 2 Build 2: aarch64/2014/feb/27 pass: 411; fail: 3; error: 2 Build 3: aarch64/2014/feb/28 pass: 404; fail: 11; error: 1 Build 4: aarch64/2014/mar/01 pass: 405; fail: 10; error: 1 Build 5: aarch64/2014/mar/02 pass: 404; fail: 11; error: 1 Build 6: aarch64/2014/mar/03 pass: 405; fail: 10; error: 1 2 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/feb/25 pass: 2,938; error: 34 Build 1: aarch64/2014/feb/26 pass: 2,938; error: 34 Build 2: aarch64/2014/feb/27 pass: 2,939; error: 33 Build 3: aarch64/2014/feb/28 pass: 2,940; error: 32 Build 4: aarch64/2014/mar/01 pass: 2,939; error: 33 Build 5: aarch64/2014/mar/02 pass: 2,939; error: 33 Build 6: aarch64/2014/mar/03 pass: 2,942; error: 30 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/feb/25 pass: 5,266; fail: 137; error: 39 Build 1: aarch64/2014/feb/26 pass: 5,269; fail: 135; error: 38 Build 2: aarch64/2014/feb/27 pass: 5,267; fail: 136; error: 39 Build 3: aarch64/2014/feb/28 pass: 5,260; fail: 141; error: 41 Build 4: aarch64/2014/mar/01 pass: 5,261; fail: 141; error: 40 Build 5: aarch64/2014/mar/02 pass: 5,262; fail: 140; error: 40 Build 6: aarch64/2014/mar/03 pass: 5,265; fail: 138; error: 39 2 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From aph at redhat.com Mon Mar 3 07:39:47 2014 From: aph at redhat.com (Andrew Haley) Date: Mon, 03 Mar 2014 15:39:47 +0000 Subject: [aarch64-port-dev ] Correct supported JDK version for JDK 7 Message-ID: <5314A243.80808@redhat.com> We must reject JDK 8 classfiles. Andrew. changeset: 6665:ff391f06a7fc tag: tip user: aph date: Mon Mar 03 15:38:07 2014 +0000 files: src/share/vm/classfile/classFileParser.cpp description: Correct supported JDK version for JDK 7. diff -r 8f399496db9b -r ff391f06a7fc src/share/vm/classfile/classFileParser.cpp --- a/src/share/vm/classfile/classFileParser.cpp Mon Mar 15 16:35:11 2032 -0400 +++ b/src/share/vm/classfile/classFileParser.cpp Mon Mar 03 15:38:07 2014 +0000 @@ -4595,8 +4595,9 @@ bool ClassFileParser::is_supported_version(u2 major, u2 minor) { u2 max_version = - JDK_Version::is_gte_jdk17x_version() ? JAVA_MAX_SUPPORTED_VERSION : - (JDK_Version::is_gte_jdk16x_version() ? JAVA_6_VERSION : JAVA_1_5_VERSION); + JDK_Version::is_gte_jdk18x_version() ? JAVA_MAX_SUPPORTED_VERSION : + (JDK_Version::is_gte_jdk17x_version() ? JAVA_7_VERSION : + (JDK_Version::is_gte_jdk16x_version() ? JAVA_6_VERSION : JAVA_1_5_VERSION)); return (major >= JAVA_MIN_SUPPORTED_VERSION) && (major <= max_version) && ((major != max_version) || From aph at redhat.com Mon Mar 3 07:43:51 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 03 Mar 2014 15:43:51 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Correct supported JDK version for JDK 7. Message-ID: <20140303154414.332DD6245E@hg.openjdk.java.net> Changeset: 623e2e5f003a Author: aph Date: 2014-03-03 15:38 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/623e2e5f003a Correct supported JDK version for JDK 7. ! src/share/vm/classfile/classFileParser.cpp From aph at redhat.com Wed Mar 5 09:45:17 2014 From: aph at redhat.com (Andrew Haley) Date: Wed, 05 Mar 2014 17:45:17 +0000 Subject: [aarch64-port-dev ] Fix JCK failure in JVMTI popframe support Message-ID: <531762AD.50801@redhat.com> Our JVMTI popframe support wasn't quite right. The wrong register was used for the bytecode pointer and InterpreterRuntime::popframe_move_outgoing_args(), which is needed by x86 but breaks things for us, was called. Also, I nioticed that when restarting a returned-to method we weren't setting the machine SP. Fixed thusly. Andrew. # HG changeset patch # User aph # Date 1394038301 0 # Wed Mar 05 16:51:41 2014 +0000 # Node ID cc094e1af98de679e81d17d3fc2653158c7b26c6 # Parent 623e2e5f003a4a17e897aa251f8d49e4234193c0 Fix JCK failure in JVMTI popframe support diff -r 623e2e5f003a -r cc094e1af98d src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp --- a/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp Mon Mar 03 15:38:07 2014 +0000 +++ b/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp Wed Mar 05 16:51:41 2014 +0000 @@ -1579,10 +1579,6 @@ // empty. Thus, for any VM calls at this point, GC will find a legal // oop map (with empty expression stack). - // In current activation - // tos: exception - // esi: exception bcp - // // JVMTI PopFrame support // @@ -1614,8 +1610,6 @@ InterpreterRuntime::interpreter_contains), c_rarg1); __ cbnz(r0, caller_not_deoptimized); - __ call_Unimplemented(); - // Compute size of arguments for saving when returning to // deoptimized caller __ get_method(r0); @@ -1653,30 +1647,12 @@ /* install_monitor_exception */ false, /* notify_jvmdi */ false); - // Finish with popframe handling - // A previous I2C followed by a deoptimization might have moved the - // outgoing arguments further up the stack. PopFrame expects the - // mutations to those outgoing arguments to be preserved and other - // constraints basically require this frame to look exactly as - // though it had previously invoked an interpreted activation with - // no space between the top of the expression stack (current - // last_sp) and the top of stack. Rather than force deopt to - // maintain this kind of invariant all the time we call a small - // fixup routine to move the mutated arguments onto the top of our - // expression stack if necessary. - __ mov(c_rarg1, sp); - __ ldr(c_rarg2, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); - // PC must point into interpreter here - __ set_last_Java_frame(noreg, rfp, (address)NULL, rscratch1); - __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::popframe_move_outgoing_args), rthread, c_rarg1, c_rarg2); - __ reset_last_Java_frame(true, true); // Restore the last_sp and null it out - __ ldr(rscratch1, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); - __ mov(esp, rscratch1); + __ ldr(esp, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); - __ restore_bcp(); // XXX do we need this? - __ restore_locals(); // XXX do we need this? + __ restore_bcp(); + __ restore_locals(); __ restore_constant_pool_cache(); __ get_method(rmethod); @@ -1694,7 +1670,7 @@ if (EnableInvokeDynamic) { Label L_done; - __ ldrb(rscratch1, Address(r13, 0)); + __ ldrb(rscratch1, Address(rbcp, 0)); __ cmpw(r1, Bytecodes::_invokestatic); __ br(Assembler::EQ, L_done); @@ -1702,7 +1678,7 @@ // Detect such a case in the InterpreterRuntime function and return the member name argument, or NULL. __ ldr(c_rarg0, Address(rlocals, 0)); - __ call_VM(r0, CAST_FROM_FN_PTR(address, InterpreterRuntime::member_name_arg_or_null), c_rarg0, rmethod, rscratch1); + __ call_VM(r0, CAST_FROM_FN_PTR(address, InterpreterRuntime::member_name_arg_or_null), c_rarg0, rmethod, rbcp); __ cbz(r0, L_done); @@ -1711,6 +1687,16 @@ } #endif // INCLUDE_JVMTI + // Restore machine SP + __ ldr(rscratch1, Address(rmethod, Method::const_offset())); + __ ldrh(rscratch1, Address(rscratch1, ConstMethod::max_stack_offset())); + __ add(rscratch1, rscratch1, frame::interpreter_frame_monitor_size() + + (EnableInvokeDynamic ? 2 : 0)); + __ ldr(rscratch2, + Address(rfp, frame::interpreter_frame_initial_sp_offset * wordSize)); + __ sub(rscratch1, rscratch2, rscratch1, ext::uxtw, 3); + __ andr(sp, rscratch1, -16); + __ dispatch_next(vtos); // end of PopFrame support From aph at redhat.com Wed Mar 5 09:45:49 2014 From: aph at redhat.com (aph at redhat.com) Date: Wed, 05 Mar 2014 17:45:49 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Fix JCK failure in JVMTI popframe support Message-ID: <20140305174601.1933462510@hg.openjdk.java.net> Changeset: cc094e1af98d Author: aph Date: 2014-03-05 16:51 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/cc094e1af98d Fix JCK failure in JVMTI popframe support ! src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp From aph at redhat.com Wed Mar 5 09:48:34 2014 From: aph at redhat.com (aph at redhat.com) Date: Wed, 05 Mar 2014 17:48:34 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/hotspot: 3 new changesets Message-ID: <20140305174851.A629962511@hg.openjdk.java.net> Changeset: ff391f06a7fc Author: aph Date: 2014-03-03 15:38 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/ff391f06a7fc Correct supported JDK version for JDK 7. ! src/share/vm/classfile/classFileParser.cpp Changeset: dbc1fca7edaf Author: aph Date: 2014-03-03 15:45 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/dbc1fca7edaf Merge Changeset: 8bca72b725af Author: aph Date: 2014-03-05 16:51 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/8bca72b725af Fix JCK failure in JVMTI popframe support ! src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp From adinn at redhat.com Thu Mar 6 01:03:58 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:03:58 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8: Added tag jdk8_b128_aarch64_rc4 for changeset 7d50a5715d95 Message-ID: <20140306090358.6DF1162549@hg.openjdk.java.net> Changeset: c9fde53a2c71 Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/c9fde53a2c71 Added tag jdk8_b128_aarch64_rc4 for changeset 7d50a5715d95 ! .hgtags From adinn at redhat.com Thu Mar 6 01:04:08 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:04:08 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/corba: Added tag jdk8_b128_aarch64_rc4 for changeset 475e82b89c04 Message-ID: <20140306090410.647C06254A@hg.openjdk.java.net> Changeset: 4cdc918e7370 Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/4cdc918e7370 Added tag jdk8_b128_aarch64_rc4 for changeset 475e82b89c04 ! .hgtags From adinn at redhat.com Thu Mar 6 01:04:21 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:04:21 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Added tag jdk8_b128_aarch64_rc4 for changeset cc094e1af98d Message-ID: <20140306090426.6EAE66254B@hg.openjdk.java.net> Changeset: e5b35062dee3 Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/e5b35062dee3 Added tag jdk8_b128_aarch64_rc4 for changeset cc094e1af98d ! .hgtags From adinn at redhat.com Thu Mar 6 01:04:36 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:04:36 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jaxp: Added tag jdk8_b128_aarch64_rc4 for changeset 6988339e7704 Message-ID: <20140306090441.D6B9D6254C@hg.openjdk.java.net> Changeset: 774d298cb7d8 Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/774d298cb7d8 Added tag jdk8_b128_aarch64_rc4 for changeset 6988339e7704 ! .hgtags From adinn at redhat.com Thu Mar 6 01:04:52 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:04:52 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jaxws: Added tag jdk8_b128_aarch64_rc4 for changeset 49646d8c8984 Message-ID: <20140306090457.9D91C6254D@hg.openjdk.java.net> Changeset: 2703e7fff622 Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/2703e7fff622 Added tag jdk8_b128_aarch64_rc4 for changeset 49646d8c8984 ! .hgtags From adinn at redhat.com Thu Mar 6 01:05:10 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:05:10 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jdk: Added tag jdk8_b128_aarch64_rc4 for changeset ba03ec7a0b93 Message-ID: <20140306090536.ABFFD6254E@hg.openjdk.java.net> Changeset: 5de3e4944a8f Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/5de3e4944a8f Added tag jdk8_b128_aarch64_rc4 for changeset ba03ec7a0b93 ! .hgtags From adinn at redhat.com Thu Mar 6 01:05:50 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:05:50 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/langtools: Added tag jdk8_b128_aarch64_rc4 for changeset 3c437f951768 Message-ID: <20140306090557.1A1736254F@hg.openjdk.java.net> Changeset: 321e6cbb8ff1 Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/321e6cbb8ff1 Added tag jdk8_b128_aarch64_rc4 for changeset 3c437f951768 ! .hgtags From adinn at redhat.com Thu Mar 6 01:06:09 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:06:09 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/nashorn: Added tag jdk8_b128_aarch64_rc4 for changeset 2c5371241159 Message-ID: <20140306090611.5E40762550@hg.openjdk.java.net> Changeset: 348b85f9c40f Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/348b85f9c40f Added tag jdk8_b128_aarch64_rc4 for changeset 2c5371241159 ! .hgtags From adinn at redhat.com Thu Mar 6 01:12:20 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:12:20 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u: Added tag jdk7u60_b04_aarch64_rc4 for changeset fa349a00b30c Message-ID: <20140306091220.DE1EC62553@hg.openjdk.java.net> Changeset: b7edcee165ce Author: adinn Date: 2014-03-06 04:13 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/rev/b7edcee165ce Added tag jdk7u60_b04_aarch64_rc4 for changeset fa349a00b30c ! .hgtags From adinn at redhat.com Thu Mar 6 01:12:27 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:12:27 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/corba: Added tag jdk7u60_b04_aarch64_rc4 for changeset 6f9d256ddd6c Message-ID: <20140306091230.D2E6862554@hg.openjdk.java.net> Changeset: af9b77fb94c0 Author: adinn Date: 2014-03-06 04:13 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/corba/rev/af9b77fb94c0 Added tag jdk7u60_b04_aarch64_rc4 for changeset 6f9d256ddd6c ! .hgtags From adinn at redhat.com Thu Mar 6 01:12:40 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:12:40 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/hotspot: Added tag jdk7u60_b04_aarch64_rc4 for changeset 22910135cca6 Message-ID: <20140306091243.241B762555@hg.openjdk.java.net> Changeset: 76ee62d60fcb Author: adinn Date: 2014-03-06 04:13 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/76ee62d60fcb Added tag jdk7u60_b04_aarch64_rc4 for changeset 22910135cca6 ! .hgtags From adinn at redhat.com Thu Mar 6 01:12:53 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:12:53 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/jaxp: Added tag jdk7u60_b04_aarch64_rc4 for changeset 8d6aca49c9ae Message-ID: <20140306091255.EC3B662556@hg.openjdk.java.net> Changeset: 9817bc39c3e3 Author: adinn Date: 2014-03-06 04:13 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/jaxp/rev/9817bc39c3e3 Added tag jdk7u60_b04_aarch64_rc4 for changeset 8d6aca49c9ae ! .hgtags From adinn at redhat.com Thu Mar 6 01:13:05 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:13:05 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/jaxws: Added tag jdk7u60_b04_aarch64_rc4 for changeset f35f8c550471 Message-ID: <20140306091312.66EF462557@hg.openjdk.java.net> Changeset: b3999f5b5042 Author: adinn Date: 2014-03-06 04:13 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/jaxws/rev/b3999f5b5042 Added tag jdk7u60_b04_aarch64_rc4 for changeset f35f8c550471 ! .hgtags From adinn at redhat.com Thu Mar 6 01:14:27 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:14:27 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/langtools: Added tag jdk7u60_b04_aarch64_rc4 for changeset 9ea54a5a2144 Message-ID: <20140306091435.05F676255A@hg.openjdk.java.net> Changeset: 95aa3f6da85b Author: adinn Date: 2014-03-06 04:13 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/langtools/rev/95aa3f6da85b Added tag jdk7u60_b04_aarch64_rc4 for changeset 9ea54a5a2144 ! .hgtags From adinn at redhat.com Thu Mar 6 01:11:02 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:11:02 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/hotspot: 7 new changesets Message-ID: <20140306091131.D7E6462551@hg.openjdk.java.net> Changeset: 0303ccd7b68d Author: Edward Nevill edward.nevill at linaro.org Date: 2014-02-28 14:25 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/0303ccd7b68d Fix runtime/7107135/Test7107135 - problems with execstack ! src/share/vm/utilities/elfFile.cpp Changeset: b20841396279 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-02-28 15:56 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/b20841396279 Make hotspot build for Zero ! src/cpu/aarch64/vm/metaspaceShared_aarch64.cpp ! src/share/vm/memory/metaspaceShared.cpp ! src/share/vm/memory/metaspaceShared.hpp Changeset: 5de1ad9a1b97 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-02-28 16:12 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/5de1ad9a1b97 Remove duplicate volatile encodings in aarch64.ad ! src/cpu/aarch64/vm/aarch64.ad Changeset: 623e2e5f003a Author: aph Date: 2014-03-03 15:38 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/623e2e5f003a Correct supported JDK version for JDK 7. ! src/share/vm/classfile/classFileParser.cpp Changeset: cc094e1af98d Author: aph Date: 2014-03-05 16:51 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/cc094e1af98d Fix JCK failure in JVMTI popframe support ! src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp Changeset: e5b35062dee3 Author: adinn Date: 2014-03-06 04:04 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/e5b35062dee3 Added tag jdk8_b128_aarch64_rc4 for changeset cc094e1af98d ! .hgtags Changeset: 22910135cca6 Author: adinn Date: 2014-03-06 04:11 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/22910135cca6 merge ! .hgtags From adinn at redhat.com Thu Mar 6 01:13:24 2014 From: adinn at redhat.com (adinn at redhat.com) Date: Thu, 06 Mar 2014 09:13:24 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/jdk: Added tag jdk7u60_b04_aarch64_rc4 for changeset 0e4b9f5a35b6 Message-ID: <20140306091412.2C08062558@hg.openjdk.java.net> Changeset: 24f1357f3564 Author: adinn Date: 2014-03-06 04:13 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/jdk/rev/24f1357f3564 Added tag jdk7u60_b04_aarch64_rc4 for changeset 0e4b9f5a35b6 ! .hgtags From juan.fumero at ed.ac.uk Thu Mar 6 07:45:56 2014 From: juan.fumero at ed.ac.uk (Juan Jose Fumero) Date: Thu, 06 Mar 2014 15:45:56 +0000 Subject: [aarch64-port-dev ] Binutils version for Fedora 20 Message-ID: <1394120756.29619.0.camel@guachinche> Hello, I am trying to build jdk8 aarch64 version [1] in the SICSA OpenJDK School. My OS is Fedora 20 and GCC version is 4.8.2 In order to build hsdis-amd64.so we need binutils. Following the instructions in the repository there is a binutils version according to the aarch64 code. But in fedora 20 it doesn't work. So we changed to a newer version of bintuils in order to build hsdis-amd64.so correctly. We linked with the version 2.23 [2]. This version compiles and works. Apart from that the following extra packages are needed: * Texinfo * Flex and bison * Flex-devel and bison-devel [1] http://hg.openjdk.java.net/aarch64-port/jdk8/ [2] http://ftp.gnu.org/gnu/binutils/ Cheers Juan Jose Fumero -- PhD Student University of Edinburgh The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336. From juan.fumero at ed.ac.uk Thu Mar 6 07:48:43 2014 From: juan.fumero at ed.ac.uk (Juan Jose Fumero) Date: Thu, 06 Mar 2014 15:48:43 +0000 Subject: [aarch64-port-dev ] Binutils version for Fedora 20 Message-ID: <1394120923.29619.2.camel@guachinche> Hello, I am trying to build jdk8 aarch64 version [1] in the SICSA OpenJDK School. My OS is Fedora 20 and GCC version is 4.8.2 In order to build hsdis-amd64.so we need binutils. Following the instructions in the repository there is a binutils version according to the aarch64 code. But in fedora 20 it doesn't work. So we changed to a newer version of bintuils in order to build hsdis-amd64.so correctly. We linked with the version 2.23 [2]. This version compiles and works. Apart from that the following extra packages are needed: * Texinfo * Flex and bison * Flex-devel and bison-devel [1] http://hg.openjdk.java.net/aarch64-port/jdk8/ [2] http://ftp.gnu.org/gnu/binutils/ Cheers Juan Jose Fumero -- PhD Student University of Edinburgh The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336. From aph at redhat.com Thu Mar 6 09:35:02 2014 From: aph at redhat.com (Andrew Haley) Date: Thu, 06 Mar 2014 17:35:02 +0000 Subject: [aarch64-port-dev ] Binutils version for Fedora 20 In-Reply-To: <1394120923.29619.2.camel@guachinche> References: <1394120923.29619.2.camel@guachinche> Message-ID: <5318B1C6.8060101@redhat.com> On 03/06/2014 03:48 PM, Juan Jose Fumero wrote: > Following the instructions in the repository there is a binutils version > according to the aarch64 code. But in fedora 20 it doesn't work Hi. Good to have you around. I don't really understand what problem you have: I'm also using F20, and it works for me. Andrew. From adinn at redhat.com Fri Mar 7 01:59:23 2014 From: adinn at redhat.com (Andrew Dinn) Date: Fri, 07 Mar 2014 09:59:23 +0000 Subject: [aarch64-port-dev ] Binutils version for Fedora 20 In-Reply-To: <5318B1C6.8060101@redhat.com> References: <1394120923.29619.2.camel@guachinche> <5318B1C6.8060101@redhat.com> Message-ID: <5319987B.7060905@redhat.com> Hi Juan, Thanks for posting your report. On 06/03/14 17:35, Andrew Haley wrote: > On 03/06/2014 03:48 PM, Juan Jose Fumero wrote: >> Following the instructions in the repository there is a binutils version >> according to the aarch64 code. But in fedora 20 it doesn't work > > Hi. Good to have you around. > > I don't really understand what problem you have: I'm also using F20, and > it works for me. The problem Juan had occurred on Fedora 20/x86. Andrew, are you referring to running F20 on x86 or on AArch64? The problem occurred when Juan tried to build the hsdis library for the x86 simulator build using our modified binutils tree (downloaded from sourceforge). Our code is based on binutils-2.23.1 and I have only ever built it using gcc 4.7. It appears to be incompatible with gcc 4.8, the version used on F20/x86, on two counts. The first problem was in the binutils configure step which reported several missing packages: texinfo, flex, flex-devel, bison and bison-devel After installing these packages the config step completed but the build failed to compile. We identified binutils-2.23.1 as the root of the problem for two reasons: another SICSA OpenJDK School participant had problems building the sourceforge binutils tree on the most recent Ubuntu which also uses a gcc 4.8 release building hsdis with binutils-2.23.tar.gz tree downloaded from gnu.org fixed the compile issue with gcc 4.8 Of course the gnu.org binutils is not satisfactory as it does not include our mods to i) use our VM-specific register names (e.g. esp for r20) and more importantly ii) recognise our extra pseudo-instructions, notifyentry, notifyexit, notifybc and brrt (brx86). So, disassemblies sing the resulting hsdis include some rather confusing 'invalid instruction' lines. I am actually not sure why this change removed the compil eproblem. The latest binutils version is 2.24. The version Juan got to work is an /earlier/ version than our modified sourceforge tree. I could reapply our modifications to binutils 2.24 and check that we can build with gcc 3.7. If so then that should help anyone who is using gcc 4.8. Juan, could you try rebuilding hsdis with binutils-2.24? We need to be sure that it works with gcc 4.8 before we decide to move to using it. regards, Andrew Dinn ----------- Principal Software Engineer Red Hat UK Ltd Registered in UK and Wales under Company Registration No. 3798903 Directors: Michael Cunningham (USA), Matt Parson (USA), Charlie Peters (USA), Paul Hickey (Ireland) From aph at redhat.com Fri Mar 7 03:03:37 2014 From: aph at redhat.com (Andrew Haley) Date: Fri, 07 Mar 2014 11:03:37 +0000 Subject: [aarch64-port-dev ] Binutils version for Fedora 20 In-Reply-To: <5319987B.7060905@redhat.com> References: <1394120923.29619.2.camel@guachinche> <5318B1C6.8060101@redhat.com> <5319987B.7060905@redhat.com> Message-ID: <5319A789.6020500@redhat.com> Hi, On 03/07/2014 09:59 AM, Andrew Dinn wrote: > Thanks for posting your report. > > On 06/03/14 17:35, Andrew Haley wrote: >> On 03/06/2014 03:48 PM, Juan Jose Fumero wrote: >>> Following the instructions in the repository there is a binutils version >>> according to the aarch64 code. But in fedora 20 it doesn't work >> >> Hi. Good to have you around. >> >> I don't really understand what problem you have: I'm also using F20, and >> it works for me. > > The problem Juan had occurred on Fedora 20/x86. Andrew, are you > referring to running F20 on x86 or on AArch64? x86. > The problem occurred when Juan tried to build the hsdis library for the > x86 simulator build using our modified binutils tree (downloaded from > sourceforge). Our code is based on binutils-2.23.1 and I have only ever > built it using gcc 4.7. It appears to be incompatible with gcc 4.8, the > version used on F20/x86, on two counts. > > The first problem was in the binutils configure step which reported > several missing packages: > > texinfo, flex, flex-devel, bison and bison-devel > > After installing these packages the config step completed but the build > failed to compile. > > We identified binutils-2.23.1 as the root of the problem for two reasons: > > another SICSA OpenJDK School participant had problems building the > sourceforge binutils tree on the most recent Ubuntu which also uses a > gcc 4.8 release > > building hsdis with binutils-2.23.tar.gz tree downloaded from gnu.org > fixed the compile issue with gcc 4.8 But what was the compile issue? Is it a secret? I just tried it again. I did have one problem with incorrect texinfo comments, fixed thusly: diff -r 9957a42098d2 bfd/doc/bfd.texinfo --- a/bfd/doc/bfd.texinfo Thu Oct 31 17:25:09 2013 +0000 +++ b/bfd/doc/bfd.texinfo Fri Mar 07 11:01:27 2014 +0000 @@ -322,8 +322,8 @@ @printindex cp @tex -% I think something like @colophon should be in texinfo. In the -% meantime: + at c I think something like @colophon should be in texinfo. In the + at c meantime: \long\def\colophon{\hbox to0pt{}\vfill \centerline{The body of this manual is set in} \centerline{\fontname\tenrm,} @@ -333,7 +333,7 @@ \centerline{{\sl\fontname\tensl\/}} \centerline{are used for emphasis.}\vfill} \page\colophon -% Blame: doc at cygnus.com, 28mar91. + at c Blame: doc at cygnus.com, 28mar91. @end tex @bye Andrew. From adinn at redhat.com Fri Mar 7 03:46:08 2014 From: adinn at redhat.com (Andrew Dinn) Date: Fri, 07 Mar 2014 11:46:08 +0000 Subject: [aarch64-port-dev ] Binutils version for Fedora 20 In-Reply-To: <5319A789.6020500@redhat.com> References: <1394120923.29619.2.camel@guachinche> <5318B1C6.8060101@redhat.com> <5319987B.7060905@redhat.com> <5319A789.6020500@redhat.com> Message-ID: <5319B180.9050201@redhat.com> On 07/03/14 11:03, Andrew Haley wrote: > But what was the compile issue? Is it a secret? Not a secret -- just I don't have the details for either the Ubuntu or F20 problem. > I just tried it again. I did have one problem with incorrect texinfo > comments, fixed thusly: > > diff -r 9957a42098d2 bfd/doc/bfd.texinfo > --- a/bfd/doc/bfd.texinfo Thu Oct 31 17:25:09 2013 +0000 > +++ b/bfd/doc/bfd.texinfo Fri Mar 07 11:01:27 2014 +0000 > @@ -322,8 +322,8 @@ > @printindex cp > > @tex > -% I think something like @colophon should be in texinfo. In the > -% meantime: > + at c I think something like @colophon should be in texinfo. In the > + at c meantime: > \long\def\colophon{\hbox to0pt{}\vfill > \centerline{The body of this manual is set in} > \centerline{\fontname\tenrm,} > @@ -333,7 +333,7 @@ > \centerline{{\sl\fontname\tensl\/}} > \centerline{are used for emphasis.}\vfill} > \page\colophon > -% Blame: doc at cygnus.com, 28mar91. > + at c Blame: doc at cygnus.com, 28mar91. > @end tex > > @bye Hmm, that looks familiar (I think the problem was somewhere under the bfd build :-) Juan, I have pushed this fix to our binutils repo. Could you try rebuilding with this patch applied? n.b. the easiest way to rebuild is to execute this in your jdk8 tree rm -rf ../binutils rm -rf hotspot/src/share/tools/hsdis rm -f build/linux-aarch64-normal-server-slowdebug/images/j2sdk-image/jre/lib/aarch64/hsdis-aarch64.so bash sim_compile the last step will clone the updated binutils repo then rebuild/install hsdis-aarch64.so Meanwhile, I will contact the people who were having problems on Ubuntu and ask them to report details of the problem they were having. regards, Andrew Dinn ----------- From aph at redhat.com Mon Mar 10 17:48:15 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:15 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/nashorn: Added tag jdk8_b128_aarch64_992 for changeset 348b85f9c40f Message-ID: <201403101748.s2AHmFig007924@aojmv0008> Changeset: 918079f38415 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/918079f38415 Added tag jdk8_b128_aarch64_992 for changeset 348b85f9c40f ! .hgtags From aph at redhat.com Mon Mar 10 17:48:14 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:14 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/corba: Added tag jdk8_b128_aarch64_992 for changeset 4cdc918e7370 Message-ID: <201403101748.s2AHmESk007882@aojmv0008> Changeset: 5a4f6f5a8496 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/5a4f6f5a8496 Added tag jdk8_b128_aarch64_992 for changeset 4cdc918e7370 ! .hgtags From aph at redhat.com Mon Mar 10 17:48:15 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:15 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jaxp: Added tag jdk8_b128_aarch64_992 for changeset 774d298cb7d8 Message-ID: <201403101748.s2AHmGSn007933@aojmv0008> Changeset: 846e52fc170b Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/846e52fc170b Added tag jdk8_b128_aarch64_992 for changeset 774d298cb7d8 ! .hgtags From aph at redhat.com Mon Mar 10 17:48:14 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:14 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jaxws: Added tag jdk8_b128_aarch64_992 for changeset 2703e7fff622 Message-ID: <201403101748.s2AHmGT6007927@aojmv0008> Changeset: a5291fce2809 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/a5291fce2809 Added tag jdk8_b128_aarch64_992 for changeset 2703e7fff622 ! .hgtags From aph at redhat.com Mon Mar 10 17:48:16 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:16 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8: Added tag jdk8_b128_aarch64_992 for changeset c9fde53a2c71 Message-ID: <201403101748.s2AHmGB8007930@aojmv0008> Changeset: a22ad3e5a6e4 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/a22ad3e5a6e4 Added tag jdk8_b128_aarch64_992 for changeset c9fde53a2c71 ! .hgtags From aph at redhat.com Mon Mar 10 17:48:16 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:16 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Added tag jdk8_b128_aarch64_992 for changeset e5b35062dee3 Message-ID: <201403101748.s2AHmHmc007936@aojmv0008> Changeset: a6537e63b117 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/a6537e63b117 Added tag jdk8_b128_aarch64_992 for changeset e5b35062dee3 ! .hgtags From aph at redhat.com Mon Mar 10 17:48:15 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:15 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/langtools: Added tag jdk8_b128_aarch64_992 for changeset 321e6cbb8ff1 Message-ID: <201403101748.s2AHmH5j007939@aojmv0008> Changeset: 169896a4214b Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/169896a4214b Added tag jdk8_b128_aarch64_992 for changeset 321e6cbb8ff1 ! .hgtags From aph at redhat.com Mon Mar 10 17:48:17 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 17:48:17 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jdk: Added tag jdk8_b128_aarch64_992 for changeset 5de3e4944a8f Message-ID: <201403101748.s2AHmN8L007962@aojmv0008> Changeset: d7fc5ec6c30d Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/d7fc5ec6c30d Added tag jdk8_b128_aarch64_992 for changeset 5de3e4944a8f ! .hgtags From aph at redhat.com Mon Mar 10 18:06:17 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 18:06:17 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u: Added tag jdk7u60_b04_aarch64_831 for changeset b7edcee165ce Message-ID: <201403101806.s2AI6HoH011331@aojmv0008> Changeset: bb25a70164f1 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/rev/bb25a70164f1 Added tag jdk7u60_b04_aarch64_831 for changeset b7edcee165ce ! .hgtags From aph at redhat.com Mon Mar 10 18:06:19 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 18:06:19 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/corba: Added tag jdk7u60_b04_aarch64_831 for changeset af9b77fb94c0 Message-ID: <201403101806.s2AI6Ju1011414@aojmv0008> Changeset: 062d34833910 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/corba/rev/062d34833910 Added tag jdk7u60_b04_aarch64_831 for changeset af9b77fb94c0 ! .hgtags From aph at redhat.com Mon Mar 10 18:06:18 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 18:06:18 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/jaxp: Added tag jdk7u60_b04_aarch64_831 for changeset 9817bc39c3e3 Message-ID: <201403101806.s2AI6JY4011408@aojmv0008> Changeset: 8d0b651f4537 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/jaxp/rev/8d0b651f4537 Added tag jdk7u60_b04_aarch64_831 for changeset 9817bc39c3e3 ! .hgtags From aph at redhat.com Mon Mar 10 18:06:19 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 18:06:19 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/jaxws: Added tag jdk7u60_b04_aarch64_831 for changeset b3999f5b5042 Message-ID: <201403101806.s2AI6Kvm011421@aojmv0008> Changeset: 831288f0db78 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/jaxws/rev/831288f0db78 Added tag jdk7u60_b04_aarch64_831 for changeset b3999f5b5042 ! .hgtags From aph at redhat.com Mon Mar 10 18:06:19 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 18:06:19 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/hotspot: Added tag jdk7u60_b04_aarch64_831 for changeset 76ee62d60fcb Message-ID: <201403101806.s2AI6Kdf011417@aojmv0008> Changeset: d6554ae6f2b1 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/d6554ae6f2b1 Added tag jdk7u60_b04_aarch64_831 for changeset 76ee62d60fcb ! .hgtags From aph at redhat.com Mon Mar 10 18:06:18 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 18:06:18 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/langtools: Added tag jdk7u60_b04_aarch64_831 for changeset 95aa3f6da85b Message-ID: <201403101806.s2AI6J6S011409@aojmv0008> Changeset: a54f411174bb Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/langtools/rev/a54f411174bb Added tag jdk7u60_b04_aarch64_831 for changeset 95aa3f6da85b ! .hgtags From aph at redhat.com Mon Mar 10 18:06:20 2014 From: aph at redhat.com (aph at redhat.com) Date: Mon, 10 Mar 2014 18:06:20 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/jdk: Added tag jdk7u60_b04_aarch64_831 for changeset 24f1357f3564 Message-ID: <201403101806.s2AI6QOm011779@aojmv0008> Changeset: 9f7e97ccf9ec Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/jdk/rev/9f7e97ccf9ec Added tag jdk7u60_b04_aarch64_831 for changeset 24f1357f3564 ! .hgtags From edward.nevill at linaro.org Tue Mar 11 15:46:09 2014 From: edward.nevill at linaro.org (Edward Nevill) Date: Tue, 11 Mar 2014 15:46:09 +0000 Subject: [aarch64-port-dev ] Fix overflow on field offsets Message-ID: <1394552769.10069.25.camel@localhost.localdomain> Hi, The following patch fixes a problem encountered in the JDK JTREG test sun/nio/cs/OLD/TestIBMDB.java which generates a guarantee failure due to the offset being too large for an ldr instruction. $ /home/ed/images/j2sdk-server-release/bin/java -version openjdk version "1.8.0-internal" OpenJDK Runtime Environment (build 1.8.0-internal-ed_2014_02_28_16_19-b00) OpenJDK 64-Bit Server VM (build 25.0-b69, mixed mode) $ /home/ed/images/j2sdk-server-release/bin/java TestIBMDB ... # # A fatal error has been detected by the Java Runtime Environment: # # Internal Error (assembler_aarch64.hpp:257), pid=6511, tid=547116085744 # guarantee(chk == -1 || chk == 0) failed: Field too big for insn # Regards, Ed. --- CUT HERE --- exporting patch: # HG changeset patch # User Edward Nevill edward.nevill at linaro.org # Date 1394552661 0 # Tue Mar 11 15:44:21 2014 +0000 # Node ID 939480aaf1b23f1013de7bca05dd6a2c3cef3430 # Parent a6537e63b117b13eaa108f2a1931e1ce6cf44122 Fix problem with field offsets overflowing diff -r a6537e63b117 -r 939480aaf1b2 src/cpu/aarch64/vm/aarch64.ad --- a/src/cpu/aarch64/vm/aarch64.ad Mon Mar 10 08:08:30 2014 -0400 +++ b/src/cpu/aarch64/vm/aarch64.ad Tue Mar 11 15:44:21 2014 +0000 @@ -1812,7 +1812,7 @@ } if (index == -1) { - (masm.*insn)(reg, Address(base, disp)); + (masm.*insn)(reg, masm.form_address(rscratch1, base, disp, 0)); } else { if (disp == 0) { (masm.*insn)(reg, Address(base, as_Register(index), scale)); @@ -1841,7 +1841,7 @@ } if (index == -1) { - (masm.*insn)(reg, Address(base, disp)); + (masm.*insn)(reg, masm.form_address(rscratch1, base, disp, 0)); } else { if (disp == 0) { (masm.*insn)(reg, Address(base, as_Register(index), scale)); --- CUT HERE --- From ed at camswl.com Wed Mar 12 09:25:13 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 12 Mar 2014 09:25:13 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Fix problem with field offsets overflowing Message-ID: <201403120925.s2C9PFMK028875@aojmv0008> Changeset: 939480aaf1b2 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-11 15:44 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/939480aaf1b2 Fix problem with field offsets overflowing ! src/cpu/aarch64/vm/aarch64.ad From edward.nevill at linaro.org Tue Mar 18 10:52:25 2014 From: edward.nevill at linaro.org (Edward Nevill) Date: Tue, 18 Mar 2014 10:52:25 +0000 Subject: [aarch64-port-dev ] RFR: Add support for G1GC Message-ID: <1395139945.16914.4.camel@localhost.localdomain> Hi, The following patch adds support for G1GC. This is disabled by default and only enabled with the -XX:+UseG1GC option. I have tested this against JTreg hotspot and it gives no additional failures/errors. OK to push? Ed. --- CUT HERE --- exporting patch: # HG changeset patch # User Edward Nevill edward.nevill at linaro.org # Date 1395139429 0 # Tue Mar 18 10:43:49 2014 +0000 # Node ID 53205a277e07e8be32c4592ba0982f7bc3817717 # Parent 939480aaf1b23f1013de7bca05dd6a2c3cef3430 Add support for G1GC diff -r 939480aaf1b2 -r 53205a277e07 src/cpu/aarch64/vm/aarch64.ad --- a/src/cpu/aarch64/vm/aarch64.ad Tue Mar 11 15:44:21 2014 +0000 +++ b/src/cpu/aarch64/vm/aarch64.ad Tue Mar 18 10:43:49 2014 +0000 @@ -5112,6 +5112,19 @@ // Store Instructions +// Store CMS card-mark Immediate +instruct storeimmCM0(immI0 zero, memory mem) +%{ + match(Set mem (StoreCM mem zero)); + + ins_cost(MEMORY_REF_COST); + format %{ "strb zr, $mem\t# byte" %} + + ins_encode(aarch64_enc_strb0(mem)); + + ins_pipe(pipe_class_memory); +%} + // Store Byte instruct storeB(iRegI src, memory mem) %{ @@ -5126,6 +5139,7 @@ ins_pipe(pipe_class_memory); %} + instruct storeimmB0(immI0 zero, memory mem) %{ match(Set mem (StoreB mem zero)); diff -r 939480aaf1b2 -r 53205a277e07 src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp Tue Mar 11 15:44:21 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp Tue Mar 18 10:43:49 2014 +0000 @@ -542,14 +542,46 @@ ///////////////////////////////////////////////////////////////////////////// #if INCLUDE_ALL_GCS -void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { Unimplemented(); } +void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { + // At this point we know that marking is in progress. + // If do_load() is true then we have to emit the + // load of the previous value; otherwise it has already + // been loaded into _pre_val. + + __ bind(_entry); + assert(pre_val()->is_register(), "Precondition."); + + Register pre_val_reg = pre_val()->as_register(); + + if (do_load()) { + ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/); + } + __ cbz(pre_val_reg, _continuation); + ce->store_parameter(pre_val()->as_register(), 0); + __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id))); + __ b(_continuation); +} jbyte* G1PostBarrierStub::_byte_map_base = NULL; -jbyte* G1PostBarrierStub::byte_map_base_slow() { Unimplemented(); return 0; } +jbyte* G1PostBarrierStub::byte_map_base_slow() { + BarrierSet* bs = Universe::heap()->barrier_set(); + assert(bs->is_a(BarrierSet::G1SATBCTLogging), + "Must be if we're using this."); + return ((G1SATBCardTableModRefBS*)bs)->byte_map_base; +} -void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { Unimplemented(); } +void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { + __ bind(_entry); + assert(addr()->is_register(), "Precondition."); + assert(new_val()->is_register(), "Precondition."); + Register new_val_reg = new_val()->as_register(); + __ cbz(new_val_reg, _continuation); + ce->store_parameter(addr()->as_pointer_register(), 0); + __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id))); + __ b(_continuation); +} #endif // INCLUDE_ALL_GCS ///////////////////////////////////////////////////////////////////////////// diff -r 939480aaf1b2 -r 53205a277e07 src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Tue Mar 11 15:44:21 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Tue Mar 18 10:43:49 2014 +0000 @@ -1866,47 +1866,47 @@ void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst) { assert(left->is_single_cpu() || left->is_double_cpu(), "expect single or double register"); - if (left->is_single_cpu()) { - assert (right->is_single_cpu() || right->is_constant(), "single register or constant expected"); - if (right->is_constant() - && Assembler::operand_valid_for_logical_immediate(true, right->as_jint())) { - - switch (code) { - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_jint()); break; - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_jint()); break; - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_jint()); break; - default: ShouldNotReachHere(); break; - } - } else { - switch (code) { - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_register()); break; - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_register()); break; - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_register()); break; - default: ShouldNotReachHere(); break; - } - } - } else { - assert (right->is_double_cpu() || right->is_constant(), "single register or constant expected"); - if (right->is_double_cpu()) { - switch (code) { - case lir_logic_and: __ andr(dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - case lir_logic_or: __ orr (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - case lir_logic_xor: __ eor (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - default: - ShouldNotReachHere(); - break; - } - } else { - switch (code) { - case lir_logic_and: __ andr(dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; - case lir_logic_or: __ orr (dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; - case lir_logic_xor: __ eor (dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; - default: - ShouldNotReachHere(); - break; - } - } - } + Register Rleft = left->is_single_cpu() ? left->as_register() : + left->as_register_lo(); + if (dst->is_single_cpu()) { + Register Rdst = dst->as_register(); + if (right->is_constant()) { + switch (code) { + case lir_logic_and: __ andw (Rdst, Rleft, right->as_jint()); break; + case lir_logic_or: __ orrw (Rdst, Rleft, right->as_jint()); break; + case lir_logic_xor: __ eorw (Rdst, Rleft, right->as_jint()); break; + default: ShouldNotReachHere(); break; + } + } else { + Register Rright = right->is_single_cpu() ? right->as_register() : + right->as_register_lo(); + switch (code) { + case lir_logic_and: __ andw (Rdst, Rleft, Rright); break; + case lir_logic_or: __ orrw (Rdst, Rleft, Rright); break; + case lir_logic_xor: __ eorw (Rdst, Rleft, Rright); break; + default: ShouldNotReachHere(); break; + } + } + } else { + Register Rdst = dst->as_register_lo(); + if (right->is_constant()) { + switch (code) { + case lir_logic_and: __ andr (Rdst, Rleft, right->as_jlong()); break; + case lir_logic_or: __ orr (Rdst, Rleft, right->as_jlong()); break; + case lir_logic_xor: __ eor (Rdst, Rleft, right->as_jlong()); break; + default: ShouldNotReachHere(); break; + } + } else { + Register Rright = right->is_single_cpu() ? right->as_register() : + right->as_register_lo(); + switch (code) { + case lir_logic_and: __ andr (Rdst, Rleft, Rright); break; + case lir_logic_or: __ orr (Rdst, Rleft, Rright); break; + case lir_logic_xor: __ eor (Rdst, Rleft, Rright); break; + default: ShouldNotReachHere(); break; + } + } + } } diff -r 939480aaf1b2 -r 53205a277e07 src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Tue Mar 11 15:44:21 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Tue Mar 18 10:43:49 2014 +0000 @@ -42,6 +42,9 @@ #include "runtime/vframe.hpp" #include "runtime/vframeArray.hpp" #include "vmreg_aarch64.inline.hpp" +#if INCLUDE_ALL_GCS +#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" +#endif // Implementation of StubAssembler @@ -1148,6 +1151,133 @@ } break; +#if INCLUDE_ALL_GCS + case g1_pre_barrier_slow_id: + { + StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); + // arg0 : previous value of memory + + BarrierSet* bs = Universe::heap()->barrier_set(); + if (bs->kind() != BarrierSet::G1SATBCTLogging) { + __ mov(r0, (int)id); + __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), r0); + __ should_not_reach_here(); + break; + } + + const Register pre_val = r0; + const Register thread = rthread; + const Register tmp = rscratch1; + + Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_active())); + + Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + Label done; + Label runtime; + + //__ push(r0->bit(1) | r1->bit(1), sp); + __ push(r0->bit(1) | r1->bit(1) | rscratch1->bit(1) | rscratch2->bit(1), sp); + // Can we store original value in the thread's buffer? + f.load_argument(0, pre_val); + __ ldr(tmp, queue_index); + __ cbz(tmp, runtime); + + __ sub(tmp, tmp, wordSize); + __ str(tmp, queue_index); + __ ldr(rscratch2, buffer); + __ add(tmp, tmp, rscratch2); + __ str(pre_val, Address(tmp, 0)); + __ b(done); + + __ bind(runtime); + __ push(0xfc, sp); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread); + __ pop(0xfc, sp); + __ bind(done); + //__ pop(r0->bit(1) | r1->bit(1), sp); + __ pop(r0->bit(1) | r1->bit(1) | rscratch1->bit(1) | rscratch2->bit(1), sp); + } + break; + case g1_post_barrier_slow_id: + { + StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); + + // arg0: store_address + Address store_addr(rfp, 2*BytesPerWord); + + BarrierSet* bs = Universe::heap()->barrier_set(); + CardTableModRefBS* ct = (CardTableModRefBS*)bs; + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + + Label done; + Label runtime; + + // At this point we know new_value is non-NULL and the new_value crosses regions. + // Must check to see if card is already dirty + + const Register thread = rthread; + + Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + const Register card_addr = rscratch2; + + //__ push(r0->bit(1) | r1->bit(1), sp); + __ push(r0->bit(1) | r1->bit(1) | rscratch1->bit(1) | rscratch2->bit(1), sp); + f.load_argument(0, card_addr); + __ lsr(card_addr, card_addr, CardTableModRefBS::card_shift); + // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT + // a valid address and therefore is not properly handled by the relocation code. + __ mov(rscratch1, (intptr_t)ct->byte_map_base); + __ add(card_addr, card_addr, rscratch1); + __ ldrb(rscratch1, Address(card_addr, 0)); + __ cmpw(rscratch1, (int)G1SATBCardTableModRefBS::g1_young_card_val()); + __ br(Assembler::EQ, done); + + __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + __ ldrb(rscratch1, Address(card_addr, 0)); + __ cmpw(rscratch1, (int)CardTableModRefBS::dirty_card_val()); + __ br(Assembler::EQ, done); + + // storing region crossing non-NULL, card is clean. + // dirty card and log. + + __ mov(rscratch1, (int)CardTableModRefBS::dirty_card_val()); + __ strb(rscratch1, Address(card_addr, 0)); + + __ ldr(rscratch1, queue_index); + __ cbz(rscratch1, runtime); + __ sub(rscratch1, rscratch1, wordSize); + __ str(rscratch1, queue_index); + + const Register buffer_addr = rscratch2; + + __ push(card_addr->bit(1), sp); + __ ldr(buffer_addr, buffer); + __ add(rscratch1, buffer_addr, rscratch1); + __ pop(card_addr->bit(1), sp); + __ str(card_addr, Address(rscratch1, 0)); + __ b(done); + + __ bind(runtime); + __ push(0xfc, sp); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); + __ pop(0xfc, sp); + __ bind(done); + //__ pop(r0->bit(1) | r1->bit(1), sp); + __ pop(r0->bit(1) | r1->bit(1) | rscratch1->bit(1) | rscratch2->bit(1), sp); + + } + break; +#endif + case predicate_failed_trap_id: { StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments); diff -r 939480aaf1b2 -r 53205a277e07 src/cpu/aarch64/vm/macroAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Tue Mar 11 15:44:21 2014 +0000 +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Tue Mar 18 10:43:49 2014 +0000 @@ -47,11 +47,12 @@ // #include "runtime/os.hpp" // #include "runtime/sharedRuntime.hpp" // #include "runtime/stubRoutines.hpp" -// #if INCLUDE_ALL_GCS -// #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" -// #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" -// #include "gc_implementation/g1/heapRegion.hpp" -// #endif + +#if INCLUDE_ALL_GCS +#include "gc_implementation/g1/g1CollectedHeap.inline.hpp" +#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" +#include "gc_implementation/g1/heapRegion.hpp" +#endif #ifdef PRODUCT #define BLOCK_COMMENT(str) /* nothing */ @@ -2409,13 +2410,174 @@ Register thread, Register tmp, bool tosca_live, - bool expand_call) { Unimplemented(); } + bool expand_call) { + // If expand_call is true then we expand the call_VM_leaf macro + // directly to skip generating the check by + // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp. + +#ifdef _LP64 + assert(thread == rthread, "must be"); +#endif // _LP64 + + Label done; + Label runtime; + + assert(pre_val != noreg, "check this code"); + + if (obj != noreg) + assert_different_registers(obj, pre_val, tmp); + + Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_active())); + Address index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + + // Is marking active? + if (in_bytes(PtrQueue::byte_width_of_active()) == 4) { + ldrw(tmp, in_progress); + } else { + assert(in_bytes(PtrQueue::byte_width_of_active()) == 1, "Assumption"); + ldrb(tmp, in_progress); + } + cbzw(tmp, done); + + // Do we need to load the previous value? + if (obj != noreg) { + load_heap_oop(pre_val, Address(obj, 0)); + } + + // Is the previous value null? + cbz(pre_val, done); + + // Can we store original value in the thread's buffer? + // Is index == 0? + // (The index field is typed as size_t.) + + ldr(tmp, index); // tmp := *index_adr + cbz(tmp, runtime); // tmp == 0? + // If yes, goto runtime + + sub(tmp, tmp, wordSize); // tmp := tmp - wordSize + str(tmp, index); // *index_adr := tmp + ldr(rscratch1, buffer); + add(tmp, tmp, rscratch1); // tmp := tmp + *buffer_adr + + // Record the previous value + str(pre_val, Address(tmp, 0)); + b(done); + + bind(runtime); + // save the live input values + push(r0->bit(tosca_live) | obj->bit(obj != noreg) | pre_val->bit(true), sp); + + // Calling the runtime using the regular call_VM_leaf mechanism generates + // code (generated by InterpreterMacroAssember::call_VM_leaf_base) + // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL. + // + // If we care generating the pre-barrier without a frame (e.g. in the + // intrinsified Reference.get() routine) then ebp might be pointing to + // the caller frame and so this check will most likely fail at runtime. + // + // Expanding the call directly bypasses the generation of the check. + // So when we do not have have a full interpreter frame on the stack + // expand_call should be passed true. + + if (expand_call) { + LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); ) + pass_arg1(this, thread); + pass_arg0(this, pre_val); + MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), 2); + } else { + call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread); + } + + pop(r0->bit(tosca_live) | obj->bit(obj != noreg) | pre_val->bit(true), sp); + + bind(done); +} void MacroAssembler::g1_write_barrier_post(Register store_addr, Register new_val, Register thread, Register tmp, - Register tmp2) { Unimplemented(); } + Register tmp2) { +#ifdef _LP64 + assert(thread == rthread, "must be"); +#endif // _LP64 + + Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + BarrierSet* bs = Universe::heap()->barrier_set(); + CardTableModRefBS* ct = (CardTableModRefBS*)bs; + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + + Label done; + Label runtime; + + // Does store cross heap regions? + + mov(tmp, store_addr); + eor(tmp, tmp, new_val); + lsr(tmp, tmp, HeapRegion::LogOfHRGrainBytes); + cbz(tmp, done); + + // crosses regions, storing NULL? + + cbz(new_val, done); + + // storing region crossing non-NULL, is card already dirty? + + ExternalAddress cardtable((address) ct->byte_map_base); + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + const Register card_addr = tmp; + + mov(card_addr, store_addr); + lsr(card_addr, card_addr, CardTableModRefBS::card_shift); + + unsigned long offset; + adrp(tmp2, cardtable, offset); + + // get the address of the card + add(card_addr, card_addr, tmp2); + ldrb(tmp2, Address(card_addr, offset)); + cmpw(tmp2, (int)G1SATBCardTableModRefBS::g1_young_card_val()); + br(Assembler::EQ, done); + + membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + ldrb(tmp2, Address(card_addr, offset)); + cmpw(tmp2, (int)CardTableModRefBS::dirty_card_val()); + br(Assembler::EQ, done); + + // storing a region crossing, non-NULL oop, card is clean. + // dirty card and log. + + mov(tmp2, (int)CardTableModRefBS::dirty_card_val()); + strb(tmp2, Address(card_addr, offset)); + + ldr(rscratch1, queue_index); + cbz(rscratch1, runtime); + sub(rscratch1, rscratch1, wordSize); + str(rscratch1, queue_index); + + ldr(tmp2, buffer); + add(tmp2, tmp2, rscratch1); + str(card_addr, Address(tmp2, 0)); + b(done); + + bind(runtime); + // save the live input values + push(store_addr->bit(true) | new_val->bit(true), sp); + call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); + pop(store_addr->bit(true) | new_val->bit(true), sp); + + bind(done); +} #endif // INCLUDE_ALL_GCS --- CUT HERE --- From aph at redhat.com Tue Mar 18 11:12:33 2014 From: aph at redhat.com (Andrew Haley) Date: Tue, 18 Mar 2014 11:12:33 +0000 Subject: [aarch64-port-dev ] RFR: Add support for G1GC In-Reply-To: <1395139945.16914.4.camel@localhost.localdomain> References: <1395139945.16914.4.camel@localhost.localdomain> Message-ID: <53282A21.3080207@redhat.com> On 03/18/2014 10:52 AM, Edward Nevill wrote: > Hi, > > The following patch adds support for G1GC. > > This is disabled by default and only enabled with the -XX:+UseG1GC option. > > I have tested this against JTreg hotspot and it gives no additional failures/errors. > > OK to push? One or two questions inline: > --- CUT HERE --- > exporting patch: > # HG changeset patch > # User Edward Nevill edward.nevill at linaro.org > # Date 1395139429 0 > # Tue Mar 18 10:43:49 2014 +0000 > # Node ID 53205a277e07e8be32c4592ba0982f7bc3817717 > # Parent 939480aaf1b23f1013de7bca05dd6a2c3cef3430 > Add support for G1GC > > diff -r 939480aaf1b2 -r 53205a277e07 src/cpu/aarch64/vm/aarch64.ad > --- a/src/cpu/aarch64/vm/aarch64.ad Tue Mar 11 15:44:21 2014 +0000 > +++ b/src/cpu/aarch64/vm/aarch64.ad Tue Mar 18 10:43:49 2014 +0000 > @@ -5112,6 +5112,19 @@ > > // Store Instructions > > +// Store CMS card-mark Immediate > +instruct storeimmCM0(immI0 zero, memory mem) > +%{ > + match(Set mem (StoreCM mem zero)); > + > + ins_cost(MEMORY_REF_COST); > + format %{ "strb zr, $mem\t# byte" %} > + > + ins_encode(aarch64_enc_strb0(mem)); Are you sure this isn't a store release? I'm not sure. > @@ -1866,47 +1866,47 @@ > void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst) { > > assert(left->is_single_cpu() || left->is_double_cpu(), "expect single or double register"); > - if (left->is_single_cpu()) { > - assert (right->is_single_cpu() || right->is_constant(), "single register or constant expected"); > - if (right->is_constant() > - && Assembler::operand_valid_for_logical_immediate(true, right->as_jint())) { > - > - switch (code) { > - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_jint()); break; > - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_jint()); break; > - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_jint()); break; > - default: ShouldNotReachHere(); break; > - } > - } else { > - switch (code) { > - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_register()); break; > - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_register()); break; > - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_register()); break; > - default: ShouldNotReachHere(); break; > - } > - } > - } else { > - assert (right->is_double_cpu() || right->is_constant(), "single register or constant expected"); > - if (right->is_double_cpu()) { > - switch (code) { > - case lir_logic_and: __ andr(dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; > - case lir_logic_or: __ orr (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; > - case lir_logic_xor: __ eor (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; > - default: > - ShouldNotReachHere(); > - break; > - } > - } else { > - switch (code) { > - case lir_logic_and: __ andr(dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; > - case lir_logic_or: __ orr (dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; > - case lir_logic_xor: __ eor (dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; > - default: > - ShouldNotReachHere(); > - break; > - } > - } > - } > + Register Rleft = left->is_single_cpu() ? left->as_register() : > + left->as_register_lo(); > + if (dst->is_single_cpu()) { > + Register Rdst = dst->as_register(); > + if (right->is_constant()) { > + switch (code) { > + case lir_logic_and: __ andw (Rdst, Rleft, right->as_jint()); break; > + case lir_logic_or: __ orrw (Rdst, Rleft, right->as_jint()); break; > + case lir_logic_xor: __ eorw (Rdst, Rleft, right->as_jint()); break; > + default: ShouldNotReachHere(); break; > + } > + } else { > + Register Rright = right->is_single_cpu() ? right->as_register() : > + right->as_register_lo(); > + switch (code) { > + case lir_logic_and: __ andw (Rdst, Rleft, Rright); break; > + case lir_logic_or: __ orrw (Rdst, Rleft, Rright); break; > + case lir_logic_xor: __ eorw (Rdst, Rleft, Rright); break; > + default: ShouldNotReachHere(); break; > + } > + } > + } else { > + Register Rdst = dst->as_register_lo(); > + if (right->is_constant()) { > + switch (code) { > + case lir_logic_and: __ andr (Rdst, Rleft, right->as_jlong()); break; > + case lir_logic_or: __ orr (Rdst, Rleft, right->as_jlong()); break; > + case lir_logic_xor: __ eor (Rdst, Rleft, right->as_jlong()); break; > + default: ShouldNotReachHere(); break; > + } > + } else { > + Register Rright = right->is_single_cpu() ? right->as_register() : > + right->as_register_lo(); > + switch (code) { > + case lir_logic_and: __ andr (Rdst, Rleft, Rright); break; > + case lir_logic_or: __ orr (Rdst, Rleft, Rright); break; > + case lir_logic_xor: __ eor (Rdst, Rleft, Rright); break; > + default: ShouldNotReachHere(); break; > + } > + } > + } > } What is this rewrite of logic_op for? Is it part of this patch? > + //__ push(r0->bit(1) | r1->bit(1), sp); > + __ push(r0->bit(1) | r1->bit(1) | rscratch1->bit(1) | rscratch2->bit(1), sp); What is the commented-out code for? Why is this particular set of registers pushed? > + // Calling the runtime using the regular call_VM_leaf mechanism generates > + // code (generated by InterpreterMacroAssember::call_VM_leaf_base) > + // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL. Does it really? Otherwise this is OK. Andrew. From aph at redhat.com Tue Mar 18 14:45:11 2014 From: aph at redhat.com (aph at redhat.com) Date: Tue, 18 Mar 2014 14:45:11 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/hotspot: 2 new changesets Message-ID: <201403181445.s2IEjDG8004913@aojmv0008> Changeset: 6cb37f3a3519 Author: aph Date: 2014-03-18 14:29 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/6cb37f3a3519 Don't complain about commands obsoleted in JDK 8. ! src/share/vm/runtime/arguments.cpp Changeset: 911a2d6c5825 Author: aph Date: 2014-03-18 14:31 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/911a2d6c5825 Merge From edward.nevill at linaro.org Wed Mar 19 14:19:15 2014 From: edward.nevill at linaro.org (Edward Nevill) Date: Wed, 19 Mar 2014 14:19:15 +0000 Subject: [aarch64-port-dev ] Merge up to jdk8 release tip (tag jdk8-b132) Message-ID: <1395238755.28929.27.camel@localhost.localdomain> Hi, The patches at the URL below merge the aarch64 tree up to the tip of the jdk8 tree (tag jdk8-b132). As jdk8 was released yesterday (Mar 19), this should be the final merge as there should be no further changes to the jdk8 tree. The patches are quite small (compared with previous merges). There is just one bug fix in hotspot and there are no aarch64 specific changes. I have built and tested client/fastdebug, client/release, server/release and also client/slowdebug for the builtin sim. http://people.linaro.org/~edward.nevill/b132/patches/ OK to push? Ed. From aph at redhat.com Wed Mar 19 14:57:01 2014 From: aph at redhat.com (Andrew Haley) Date: Wed, 19 Mar 2014 14:57:01 +0000 Subject: [aarch64-port-dev ] Merge up to jdk8 release tip (tag jdk8-b132) In-Reply-To: <1395238755.28929.27.camel@localhost.localdomain> References: <1395238755.28929.27.camel@localhost.localdomain> Message-ID: <5329B03D.5040100@redhat.com> On 03/19/2014 02:19 PM, Edward Nevill wrote: > I have built and tested client/fastdebug, client/release, server/release and also client/slowdebug for the builtin sim. > > http://people.linaro.org/~edward.nevill/b132/patches/ > > OK to push? Yes, that's excellent. Thank you. Andrew. From ed at camswl.com Wed Mar 19 14:58:50 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 14:58:50 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8: 6 new changesets Message-ID: <201403191458.s2JEwqJ3019060@aojmv0008> Changeset: 1e5fe8654913 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/1e5fe8654913 Added tag jdk8-b128 for changeset 101e42de4686 ! .hgtags Changeset: 839546caab12 Author: katleman Date: 2014-02-06 17:34 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/839546caab12 Added tag jdk8-b129 for changeset 1e5fe8654913 ! .hgtags Changeset: 0c38dfecab2a Author: katleman Date: 2014-02-28 10:05 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/0c38dfecab2a Added tag jdk8-b130 for changeset 839546caab12 ! .hgtags Changeset: 2a8f4c022aa0 Author: katleman Date: 2014-02-28 13:35 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/2a8f4c022aa0 Added tag jdk8-b131 for changeset 0c38dfecab2a ! .hgtags Changeset: 1773f1fd0fac Author: katleman Date: 2014-03-04 11:50 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/1773f1fd0fac Added tag jdk8-b132 for changeset 2a8f4c022aa0 ! .hgtags Changeset: 3113f753c971 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:34 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/3113f753c971 Merge to jdk8 release tip ! .hgtags From ed at camswl.com Wed Mar 19 14:59:03 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 14:59:03 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/corba: 7 new changesets Message-ID: <201403191459.s2JEx5v9019122@aojmv0008> Changeset: 5c72d74c6805 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/5c72d74c6805 Added tag jdk8-b128 for changeset 113e7569b49b ! .hgtags Changeset: eea0d7dfcbe2 Author: katleman Date: 2014-02-06 17:34 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/eea0d7dfcbe2 Added tag jdk8-b129 for changeset 5c72d74c6805 ! .hgtags Changeset: 0683ee308085 Author: coffeys Date: 2014-02-26 23:04 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/0683ee308085 8035618: Four api/org_omg/CORBA TCK tests fail under plugin only Reviewed-by: mchung, chegar ! src/share/classes/com/sun/corba/se/spi/orb/ORB.java Changeset: 5e5c8f0c45dd Author: katleman Date: 2014-02-28 10:05 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/5e5c8f0c45dd Added tag jdk8-b130 for changeset 0683ee308085 ! .hgtags Changeset: 84fed37bbe64 Author: katleman Date: 2014-02-28 13:36 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/84fed37bbe64 Added tag jdk8-b131 for changeset 5e5c8f0c45dd ! .hgtags Changeset: 3d96f0a5f9e2 Author: katleman Date: 2014-03-04 11:50 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/3d96f0a5f9e2 Added tag jdk8-b132 for changeset 84fed37bbe64 ! .hgtags Changeset: 54acf41cfc8f Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:37 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/corba/rev/54acf41cfc8f Merge to jdk8 release tip ! .hgtags From ed at camswl.com Wed Mar 19 14:59:37 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 14:59:37 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: 10 new changesets Message-ID: <201403191459.s2JExj6O019221@aojmv0008> Changeset: cb39165c4a65 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/cb39165c4a65 Added tag jdk8-b128 for changeset 874c0b4a946c ! .hgtags Changeset: 1dbaf664a611 Author: katleman Date: 2014-02-06 17:34 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/1dbaf664a611 Added tag jdk8-b129 for changeset cb39165c4a65 ! .hgtags Changeset: b5e7ebfe185c Author: katleman Date: 2014-02-28 10:06 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/b5e7ebfe185c Added tag jdk8-b130 for changeset 1dbaf664a611 ! .hgtags Changeset: 5380dc5d007e Author: katleman Date: 2014-02-28 13:36 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/5380dc5d007e Added tag jdk8-b131 for changeset b5e7ebfe185c ! .hgtags Changeset: 54f0c207dc35 Author: amurillo Date: 2014-01-28 15:11 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/54f0c207dc35 8032984: new hotspot build - hs25-b70 Reviewed-by: jcoomes ! make/hotspot_version Changeset: e46f2ee62e78 Author: vlivanov Date: 2014-03-03 16:10 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/e46f2ee62e78 8036100: Default method returns true for a while, and then returns false Reviewed-by: kvn, jrose ! src/share/vm/ci/ciMethod.cpp + test/compiler/inlining/InlineDefaultMethod1.java Changeset: 9f9179e8f0cf Author: amurillo Date: 2014-03-03 17:48 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/9f9179e8f0cf Merge Changeset: 0c94c41dcd70 Author: amurillo Date: 2014-03-03 17:48 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/0c94c41dcd70 Added tag hs25-b70 for changeset 9f9179e8f0cf ! .hgtags Changeset: 87ee5ee27509 Author: katleman Date: 2014-03-04 11:51 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/87ee5ee27509 Added tag jdk8-b132 for changeset 0c94c41dcd70 ! .hgtags Changeset: b56e2e46bfe1 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:39 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/b56e2e46bfe1 Merge to jdk8 release tip ! .hgtags ! make/hotspot_version ! src/share/vm/ci/ciMethod.cpp From ed at camswl.com Wed Mar 19 14:59:57 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 14:59:57 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jaxp: 6 new changesets Message-ID: <201403191500.s2JF03cW019265@aojmv0008> Changeset: b7752cea7c81 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/b7752cea7c81 Added tag jdk8-b128 for changeset b1839922f10c ! .hgtags Changeset: 0cb0cd015218 Author: katleman Date: 2014-02-06 17:34 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/0cb0cd015218 Added tag jdk8-b129 for changeset b7752cea7c81 ! .hgtags Changeset: 79d8b7fac21d Author: katleman Date: 2014-02-28 10:06 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/79d8b7fac21d Added tag jdk8-b130 for changeset 0cb0cd015218 ! .hgtags Changeset: 5993346020d1 Author: katleman Date: 2014-02-28 13:36 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/5993346020d1 Added tag jdk8-b131 for changeset 79d8b7fac21d ! .hgtags Changeset: 0c49f9209035 Author: katleman Date: 2014-03-04 11:51 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/0c49f9209035 Added tag jdk8-b132 for changeset 5993346020d1 ! .hgtags Changeset: 2d369e3a1546 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:41 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxp/rev/2d369e3a1546 Merge to jdk8 release tip ! .hgtags From ed at camswl.com Wed Mar 19 15:00:14 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 15:00:14 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jaxws: 6 new changesets Message-ID: <201403191500.s2JF0KcI019422@aojmv0008> Changeset: aabc90596123 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/aabc90596123 Added tag jdk8-b128 for changeset de172acc095b ! .hgtags Changeset: 4195c0956930 Author: katleman Date: 2014-02-06 17:35 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/4195c0956930 Added tag jdk8-b129 for changeset aabc90596123 ! .hgtags Changeset: 012b935707fa Author: katleman Date: 2014-02-28 10:06 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/012b935707fa Added tag jdk8-b130 for changeset 4195c0956930 ! .hgtags Changeset: c2be0dd15dbf Author: katleman Date: 2014-02-28 13:36 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/c2be0dd15dbf Added tag jdk8-b131 for changeset 012b935707fa ! .hgtags Changeset: d03dd22762db Author: katleman Date: 2014-03-04 11:51 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/d03dd22762db Added tag jdk8-b132 for changeset c2be0dd15dbf ! .hgtags Changeset: 6b9fb49c9101 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:43 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jaxws/rev/6b9fb49c9101 Merge to jdk8 release tip ! .hgtags From ed at camswl.com Wed Mar 19 15:00:36 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 15:00:36 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/jdk: 12 new changesets Message-ID: <201403191501.s2JF1cjR019585@aojmv0008> Changeset: 3c9473004f38 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/3c9473004f38 Added tag jdk8-b128 for changeset f644211c59fd ! .hgtags Changeset: ab6e7bb8ff9f Author: pchelko Date: 2014-01-22 16:15 +0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/ab6e7bb8ff9f 7155984: Security problems in regression test java/awt/PrintJob/Security/SecurityDialogTest.java Reviewed-by: anthony, serb ! src/macosx/classes/apple/laf/JRSUIUtils.java Changeset: eef10feca8ca Author: lana Date: 2014-02-06 13:28 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/eef10feca8ca Merge Changeset: 7534523b4174 Author: henryjen Date: 2014-02-06 10:30 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/7534523b4174 8033590: java.util.Comparator::thenComparing has unnecessary type restriction Reviewed-by: psandoz ! src/share/classes/java/util/Comparator.java ! test/java/util/Comparator/TypeTest.java Changeset: 80568a19aab7 Author: lana Date: 2014-02-06 13:29 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/80568a19aab7 Merge Changeset: 43386cc9a017 Author: katleman Date: 2014-02-06 17:35 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/43386cc9a017 Added tag jdk8-b129 for changeset 80568a19aab7 ! .hgtags Changeset: b07a8059dc08 Author: katleman Date: 2014-02-28 10:07 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/b07a8059dc08 Added tag jdk8-b130 for changeset 43386cc9a017 ! .hgtags Changeset: 183a8c520b4a Author: rfield Date: 2014-02-28 10:43 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/183a8c520b4a 8035777: Consistent Lambda construction Reviewed-by: ahgross, briangoetz, dlsmith ! src/share/classes/java/lang/invoke/AbstractValidatingLambdaMetafactory.java ! src/share/classes/java/lang/invoke/TypeConvertingMethodAdapter.java + test/java/lang/invoke/lambda/LambdaReceiver.java + test/java/lang/invoke/lambda/LambdaReceiverBridge.java + test/java/lang/invoke/lambda/LambdaReceiver_anotherpkg/LambdaReceiver_A.java + test/java/lang/invoke/lambda/LambdaReturn.java + test/java/lang/invoke/lambda/MetafactoryArityTest.java + test/java/lang/invoke/lambda/MetafactoryParameterCastTest.java + test/java/lang/invoke/lambda/MetafactorySamReturnTest.java Changeset: e291ac47c9a9 Author: lana Date: 2014-02-28 11:51 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/e291ac47c9a9 Merge Changeset: 43cb25339b55 Author: katleman Date: 2014-02-28 13:36 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/43cb25339b55 Added tag jdk8-b131 for changeset e291ac47c9a9 ! .hgtags Changeset: 687fd7c7986d Author: katleman Date: 2014-03-04 11:51 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/687fd7c7986d Added tag jdk8-b132 for changeset 43cb25339b55 ! .hgtags Changeset: 246d1b83d711 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:45 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/jdk/rev/246d1b83d711 Merge to jdk8 release tip ! .hgtags ! src/share/classes/java/lang/invoke/AbstractValidatingLambdaMetafactory.java ! src/share/classes/java/lang/invoke/TypeConvertingMethodAdapter.java From ed at camswl.com Wed Mar 19 15:02:02 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 15:02:02 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/langtools: 6 new changesets Message-ID: <201403191502.s2JF29lg019646@aojmv0008> Changeset: 8fe7202d3c38 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/8fe7202d3c38 Added tag jdk8-b128 for changeset 09cdd3b493c0 ! .hgtags Changeset: 9d81ae1c417a Author: katleman Date: 2014-02-06 17:35 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/9d81ae1c417a Added tag jdk8-b129 for changeset 8fe7202d3c38 ! .hgtags Changeset: 196ab3dcbd28 Author: katleman Date: 2014-02-28 10:08 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/196ab3dcbd28 Added tag jdk8-b130 for changeset 9d81ae1c417a ! .hgtags Changeset: c8a87a58eb3e Author: katleman Date: 2014-02-28 13:37 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/c8a87a58eb3e Added tag jdk8-b131 for changeset 196ab3dcbd28 ! .hgtags Changeset: 1ff9d5118aae Author: katleman Date: 2014-03-04 11:52 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/1ff9d5118aae Added tag jdk8-b132 for changeset c8a87a58eb3e ! .hgtags Changeset: e7a1641cb36c Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:46 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/langtools/rev/e7a1641cb36c Merge to jdk8 release tip ! .hgtags From ed at camswl.com Wed Mar 19 15:02:19 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 15:02:19 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/nashorn: 6 new changesets Message-ID: <201403191502.s2JF2MJs019722@aojmv0008> Changeset: 9cc3fd32fbab Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/9cc3fd32fbab Added tag jdk8-b128 for changeset 73cbad0c5d28 ! .hgtags Changeset: f87eba70e9ee Author: katleman Date: 2014-02-06 17:35 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/f87eba70e9ee Added tag jdk8-b129 for changeset 9cc3fd32fbab ! .hgtags Changeset: cca9748cfec7 Author: katleman Date: 2014-02-28 10:09 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/cca9748cfec7 Added tag jdk8-b130 for changeset f87eba70e9ee ! .hgtags Changeset: 5dbdae28a6f3 Author: katleman Date: 2014-02-28 13:37 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/5dbdae28a6f3 Added tag jdk8-b131 for changeset cca9748cfec7 ! .hgtags Changeset: 096dc407d310 Author: katleman Date: 2014-03-04 11:52 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/096dc407d310 Added tag jdk8-b132 for changeset 5dbdae28a6f3 ! .hgtags Changeset: b11cabd5de45 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:48 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/nashorn/rev/b11cabd5de45 Merge to jdk8 release tip ! .hgtags From edward.nevill at linaro.org Wed Mar 19 16:23:17 2014 From: edward.nevill at linaro.org (Edward Nevill) Date: Wed, 19 Mar 2014 16:23:17 +0000 Subject: [aarch64-port-dev ] RFR: Remove mistaken shift in form_address Message-ID: <1395246197.28929.38.camel@localhost.localdomain> Hi, I came across this while looking at the implicit exception offsets. I believe the shift removed by the patch below is mistaken. 'byte_offset' is already the offset in bytes so shifting it by scale of the data being loaded is wrong. Regards, Ed. Here is some context Address MacroAssembler::form_address(Register Rd, Register base, long byte_offset, int shift) { if (Address::offset_ok_for_immed(byte_offset, shift)) // It fits; no need for any heroics return Address(base, byte_offset); // Don't do anything clever with negative or misaligned offsets unsigned mask = (1 << shift) - 1; if (byte_offset < 0 || byte_offset & mask) { mov(Rd, byte_offset); <<<<< Here it doesn't apply the shift add(Rd, base, Rd); return Address(Rd); } // See if we can do this with two 12-bit offsets { unsigned long word_offset = byte_offset >> shift; <<<< and here it assumes it needs to shift right unsigned long masked_offset = word_offset & 0xfff000; if (Address::offset_ok_for_immed(word_offset - masked_offset) && Assembler::operand_valid_for_add_sub_immediate(masked_offset << shift)) { add(Rd, base, masked_offset << shift); word_offset -= masked_offset; return Address(Rd, word_offset << shift); } } // Do it the hard way mov(Rd, byte_offset << shift); <<<<<< but here it shift the byte offset left???? add(Rd, base, Rd); return Address(Rd); } --- CUT HERE --- exporting patch: # HG changeset patch # User Edward Nevill edward.nevill at linaro.org # Date 1395245750 0 # Wed Mar 19 16:15:50 2014 +0000 # Node ID 9393c177ac9b9407f1f4e58bd662b719b40ded54 # Parent b56e2e46bfe1de5761fbdaf4fd9b021320ab3a18 Remove mistaken shift in form_address diff -r b56e2e46bfe1 -r 9393c177ac9b src/cpu/aarch64/vm/macroAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Wed Mar 19 10:39:35 2014 +0000 +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 @@ -1399,7 +1399,7 @@ } // Do it the hard way - mov(Rd, byte_offset << shift); + mov(Rd, byte_offset); add(Rd, base, Rd); return Address(Rd); } --- CUT HERE --- From aph at redhat.com Wed Mar 19 17:30:48 2014 From: aph at redhat.com (Andrew Haley) Date: Wed, 19 Mar 2014 17:30:48 +0000 Subject: [aarch64-port-dev ] RFR: Remove mistaken shift in form_address In-Reply-To: <1395246197.28929.38.camel@localhost.localdomain> References: <1395246197.28929.38.camel@localhost.localdomain> Message-ID: <5329D448.2020809@redhat.com> On 03/19/2014 04:23 PM, Edward Nevill wrote: > I believe the shift removed by the patch below is mistaken. 'byte_offset' is already the offset in bytes so shifting it by scale of the data being loaded is wrong. Absolutely right. It would be much less confusing if the argument passed were a size rather than a shift, and form_address used exact_log2 to get the shift. But your patch is OK. Andrew. From edward.nevill at linaro.org Wed Mar 19 17:41:47 2014 From: edward.nevill at linaro.org (Edward Nevill) Date: Wed, 19 Mar 2014 17:41:47 +0000 Subject: [aarch64-port-dev ] RFR: suppress implicit null check when offsets too large for immediate Message-ID: <1395250907.28929.48.camel@localhost.localdomain> Hi, The following patch suppresses the null pointer check if the offset is too large to fit in a single load/store. This is necessary because in this case MacroAssembler::form_address can insert extra instructions before the load/store and the null pointer check can end up pointing to the wrong instruction. For simplicity in this patch I suppress the implicit null pointer check with any offset >= 1024 (ie I just pass 0 as the shift value to offset_ok_for_immed). The actual shift value does not seem to be readily available and I do not believe it will make any significant difference. This is not a pretty solution and I think it needs to be revised in the future with a better structured approach to handle this. However for now this will solve the problem. Regards, Ed. --- CUT HERE --- exporting patch: # HG changeset patch # User Edward Nevill edward.nevill at linaro.org # Date 1395250240 0 # Wed Mar 19 17:30:40 2014 +0000 # Node ID 43a2aad9e18b9f6b304e68bede9ce46c86659774 # Parent 9393c177ac9b9407f1f4e58bd662b719b40ded54 Suppress implicit null pointer check if offset too large for immediate diff -r 9393c177ac9b -r 43a2aad9e18b src/share/vm/opto/lcm.cpp --- a/src/share/vm/opto/lcm.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/share/vm/opto/lcm.cpp Wed Mar 19 17:30:40 2014 +0000 @@ -219,6 +219,11 @@ if( val->bottom_type()->isa_narrowoop() && MacroAssembler::needs_explicit_null_check(offset) ) continue; // Give up if offset is beyond page size +#ifdef AARCH64 + if( val->bottom_type()->isa_narrowoop() && + !Address::offset_ok_for_immed(offset, 0) ) + continue; +#endif // cannot reason about it; is probably not implicit null exception } else { const TypePtr* tptr; @@ -236,6 +241,10 @@ offset += tptr->_offset; // correct if base is offseted if( MacroAssembler::needs_explicit_null_check(offset) ) continue; // Give up is reference is beyond 4K page size +#ifdef AARCH64 + if( !Address::offset_ok_for_immed(offset, 0) ) + continue; +#endif } } --- CUT HERE --- From ed at camswl.com Wed Mar 19 17:42:43 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 19 Mar 2014 17:42:43 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Remove mistaken shift in form_address Message-ID: <201403191742.s2JHgiq8015287@aojmv0008> Changeset: 9393c177ac9b Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 16:15 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/9393c177ac9b Remove mistaken shift in form_address ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp From aph at redhat.com Thu Mar 20 16:25:02 2014 From: aph at redhat.com (Andrew Haley) Date: Thu, 20 Mar 2014 16:25:02 +0000 Subject: [aarch64-port-dev ] RFR: suppress implicit null check when offsets too large for immediate In-Reply-To: <1395250907.28929.48.camel@localhost.localdomain> References: <1395250907.28929.48.camel@localhost.localdomain> Message-ID: <532B165E.9020302@redhat.com> Hi, On 03/19/2014 05:41 PM, Edward Nevill wrote: > The following patch suppresses the null pointer check if the offset > is too large to fit in a single load/store. > > This is necessary because in this case MacroAssembler::form_address > can insert extra instructions before the load/store and the null > pointer check can end up pointing to the wrong instruction. > > For simplicity in this patch I suppress the implicit null pointer > check with any offset >= 1024 (ie I just pass 0 as the shift value > to offset_ok_for_immed). The actual shift value does not seem to be > readily available and I do not believe it will make any significant > difference. > > This is not a pretty solution and I think it needs to be revised in > the future with a better structured approach to handle this. However > for now this will solve the problem. I found the root cause of this problem. The operand types used by the memory access instructions in aarch64.ad are wrong. For example, -operand indIndexScaledOffsetI(iRegP reg, iRegL lreg, immIScale scale, immIAddSub off) +operand indIndexScaledOffsetI(iRegP reg, iRegL lreg, immIScale scale, immIU12 off) Here we see that an immIAddSub is being used. This is wrong: it allows more ranges than a scaled offset instruction, which only accepts an unsigned 12-bit scaled offset. I've been through aarch64.ad and fixed all of them, I hope. Andrew. # HG changeset patch # User aph # Date 1395332256 14400 # Thu Mar 20 12:17:36 2014 -0400 # Node ID 16e2ffe3b357aa5e6f7f255fd19777fa6c21a9c5 # Parent dd34c2dac1b81d174648b8dbcc667f39f2819b82 Correct operand perdicates used by load and store operands. diff -r dd34c2dac1b8 -r 16e2ffe3b357 src/cpu/aarch64/vm/aarch64.ad --- a/src/cpu/aarch64/vm/aarch64.ad Thu Mar 20 10:13:24 2014 -0400 +++ b/src/cpu/aarch64/vm/aarch64.ad Thu Mar 20 12:17:36 2014 -0400 @@ -3547,16 +3547,34 @@ interface(CONST_INTER); %} -// Valid 9 bit unsigned offset -operand immI9() -%{ - predicate(((-(1 << 8)) <= n->get_int()) && (n->get_int() < (1 << 8))); +operand immLU12() +%{ + predicate((0 <= n->get_long()) && (n->get_long() < (1 << 12))); + match(ConL); + + format %{ %} + interface(CONST_INTER); +%} + +// Offset for scaled or unscaled immediate loads and stores +operand immIOffset() +%{ + predicate(Address::offset_ok_for_immed(n->get_int())); match(ConI); format %{ %} interface(CONST_INTER); %} +operand immLoffset() +%{ + predicate(Address::offset_ok_for_immed(n->get_long())); + match(ConL); + + format %{ %} + interface(CONST_INTER); +%} + // 32 bit integer valid for add sub immediate operand immIAddSub() %{ @@ -4115,7 +4133,7 @@ %} %} -operand indIndexScaledOffsetI(iRegP reg, iRegL lreg, immIScale scale, immIAddSub off) +operand indIndexScaledOffsetI(iRegP reg, iRegL lreg, immIScale scale, immIU12 off) %{ constraint(ALLOC_IN_RC(ptr_reg)); match(AddP (AddP reg (LShiftL lreg scale)) off); @@ -4129,7 +4147,7 @@ %} %} -operand indIndexScaledOffsetL(iRegP reg, iRegL lreg, immIScale scale, immLAddSub off) +operand indIndexScaledOffsetL(iRegP reg, iRegL lreg, immIScale scale, immLU12 off) %{ constraint(ALLOC_IN_RC(ptr_reg)); match(AddP (AddP reg (LShiftL lreg scale)) off); @@ -4143,7 +4161,7 @@ %} %} -operand indIndexScaledOffsetI2L(iRegP reg, iRegI ireg, immIScale scale, immLAddSub off) +operand indIndexScaledOffsetI2L(iRegP reg, iRegI ireg, immIScale scale, immLU12 off) %{ constraint(ALLOC_IN_RC(ptr_reg)); match(AddP (AddP reg (LShiftL (ConvI2L ireg) scale)) off); @@ -4199,7 +4217,7 @@ %} %} -operand indOffI(iRegP reg, immIAddSub off) +operand indOffI(iRegP reg, immIOffset off) %{ constraint(ALLOC_IN_RC(ptr_reg)); match(AddP reg off); @@ -4213,7 +4231,7 @@ %} %} -operand indOffL(iRegP reg, immLAddSub off) +operand indOffL(iRegP reg, immLoffset off) %{ constraint(ALLOC_IN_RC(ptr_reg)); match(AddP reg off); @@ -4243,7 +4261,7 @@ %} %} -operand indIndexScaledOffsetIN(iRegN reg, iRegL lreg, immIScale scale, immIAddSub off) +operand indIndexScaledOffsetIN(iRegN reg, iRegL lreg, immIScale scale, immIU12 off) %{ predicate(Universe::narrow_oop_shift() == 0); constraint(ALLOC_IN_RC(ptr_reg)); @@ -4258,7 +4276,7 @@ %} %} -operand indIndexScaledOffsetLN(iRegN reg, iRegL lreg, immIScale scale, immLAddSub off) +operand indIndexScaledOffsetLN(iRegN reg, iRegL lreg, immIScale scale, immLU12 off) %{ predicate(Universe::narrow_oop_shift() == 0); constraint(ALLOC_IN_RC(ptr_reg)); @@ -4273,7 +4291,7 @@ %} %} -operand indIndexScaledOffsetI2LN(iRegN reg, iRegI ireg, immIScale scale, immLAddSub off) +operand indIndexScaledOffsetI2LN(iRegN reg, iRegI ireg, immIScale scale, immLU12 off) %{ predicate(Universe::narrow_oop_shift() == 0); constraint(ALLOC_IN_RC(ptr_reg)); @@ -4333,7 +4351,7 @@ %} %} -operand indOffIN(iRegN reg, immIAddSub off) +operand indOffIN(iRegN reg, immIOffset off) %{ predicate(Universe::narrow_oop_shift() == 0); constraint(ALLOC_IN_RC(ptr_reg)); @@ -4348,7 +4366,7 @@ %} %} -operand indOffLN(iRegN reg, immLAddSub off) +operand indOffLN(iRegN reg, immLoffset off) %{ predicate(Universe::narrow_oop_shift() == 0); constraint(ALLOC_IN_RC(ptr_reg)); From openjdk-testing at linaro.org Thu Mar 20 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Thu, 20 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140320120026.C15DB2138C@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/079/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,949; error: 23 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,271; fail: 130; error: 47 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Thu Mar 20 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Thu, 20 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140320120026.E964E20A33@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/079/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,955; error: 17 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,284; fail: 124; error: 40 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Fri Mar 21 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Fri, 21 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140321120055.B348621386@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/080/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,949; error: 23 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,271; fail: 130; error: 47 Build 1: aarch64/2014/mar/21 pass: 5,277; fail: 128; error: 43 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Fri Mar 21 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Fri, 21 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140321120127.4C35D21305@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/080/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 2: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,955; error: 17 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,955; error: 17 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,284; fail: 124; error: 40 Build 1: aarch64/2014/mar/21 pass: 5,285; fail: 123; error: 40 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From edward.nevill at linaro.org Fri Mar 21 13:59:06 2014 From: edward.nevill at linaro.org (Edward Nevill) Date: Fri, 21 Mar 2014 13:59:06 +0000 Subject: [aarch64-port-dev ] RFR: Add support for G1GC In-Reply-To: <53282A21.3080207@redhat.com> References: <1395139945.16914.4.camel@localhost.localdomain> <53282A21.3080207@redhat.com> Message-ID: <1395410346.30081.21.camel@localhost.localdomain> On Tue, 2014-03-18 at 11:12 +0000, Andrew Haley wrote: > On 03/18/2014 10:52 AM, Edward Nevill wrote: > > +// Store CMS card-mark Immediate > > +instruct storeimmCM0(immI0 zero, memory mem) > > +%{ > > + match(Set mem (StoreCM mem zero)); > > + > > + ins_cost(MEMORY_REF_COST); > > + format %{ "strb zr, $mem\t# byte" %} > > + > > + ins_encode(aarch64_enc_strb0(mem)); > > Are you sure this isn't a store release? I'm not sure. I don't believe a store release is necessary. It does a full mem barrier in g1_write_barrier_post. See jdk8/hotspot/src/share/vm/opto/graphKit.cpp 4014 // Use Op_MemBarVolatile to achieve the effect of a StoreLoad barrier. 4015 insert_mem_bar(Op_MemBarVolatile, oop_store); 4016 __ sync_kit(this); 4017 4018 Node* card_val_reload = __ load(__ ctrl(), card_adr, TypeInt::INT, T_BYTE, Compile::AliasIdxRaw); 4019 __ if_then(card_val_reload, BoolTest::ne, dirty_card); { 4020 g1_mark_card(ideal, card_adr, oop_store, alias_idx, index, index_adr, buffer, tf); This is also in line with what is done for C1 and for the template interpreter. > > > @@ -1866,47 +1866,47 @@ > > void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst) { > What is this rewrite of logic_op for? Is it part of this patch? OK. So I found that LIR was being passed to logic_op with a mixture of single and double CPU registers. This was from LIRGenerator::G1SATBCardTableModRef_post_barrier in src/share/vm/c1/c1_LIRGenerator.cpp. I started hacking G1SATBCardTableModRef_post_barrier but there were more cases and the hack started to grow. Rather than put a growing AARCH64 specific hack in shared code I decided that the most expedient think to do would be to make logic_op accept the mix. This is what happens on x86 in any case. I predicated this on the size of dst. IE if dst is 32 bit then the whole expression must be 32 bit, otherwise if the dst is 64 bit the operands are treated as 64 bit. > > > + //__ push(r0->bit(1) | r1->bit(1), sp); > > + __ push(r0->bit(1) | r1->bit(1) | rscratch1->bit(1) | rscratch2->bit(1), sp); > > What is the commented-out code for? Why is this particular set of registers > pushed? It should be push(r0, r1), the push of rscratch1, rscratch2 is unnecessary. r0 needs to be saved, I also push r1 because it is free and because I need to save r0..r7 around the call to g1_wb_post later and by saving r1 here I only have to save r2..r7 later. > > > + // Calling the runtime using the regular call_VM_leaf mechanism generates > > + // code (generated by InterpreterMacroAssember::call_VM_leaf_base) > > + // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL. It seems to check rfp + frame::interpreter_frame_last_sp. Thanks for the review! Ed. From edward.nevill at linaro.org Fri Mar 21 14:12:25 2014 From: edward.nevill at linaro.org (Edward Nevill) Date: Fri, 21 Mar 2014 14:12:25 +0000 Subject: [aarch64-port-dev ] RFR: suppress implicit null check when offsets too large for immediate In-Reply-To: <532B165E.9020302@redhat.com> References: <1395250907.28929.48.camel@localhost.localdomain> <532B165E.9020302@redhat.com> Message-ID: <1395411145.17834.5.camel@localhost.localdomain> On Thu, 2014-03-20 at 16:25 +0000, Andrew Haley wrote: > Hi, > > On 03/19/2014 05:41 PM, Edward Nevill wrote: > -operand indIndexScaledOffsetI(iRegP reg, iRegL lreg, immIScale scale, immIAddSub off) > +operand indIndexScaledOffsetI(iRegP reg, iRegL lreg, immIScale scale, immIU12 off) > > Here we see that an immIAddSub is being used. This is wrong: it > allows more ranges than a scaled offset instruction, which only > accepts an unsigned 12-bit scaled offset. I've been through > aarch64.ad and fixed all of them, I hope. OK. I have run server/fastdebug on hotspot and langtools and have run it on the previously failing test in jdk which now passes. I have also run specjbb2013 which was showing problems with large negative offsets. There is no replication of the problem so I think your patch is good. Please backout my changeset 6675:939480aaf1b2 and apply your patch. changeset: 6675:939480aaf1b2 user: Edward Nevill edward.nevill at linaro.org date: Tue Mar 11 15:44:21 2014 +0000 files: src/cpu/aarch64/vm/aarch64.ad description: Fix problem with field offsets overflowing Thanks for sorting this, Ed. From D.Sturm42 at gmail.com Fri Mar 21 15:17:41 2014 From: D.Sturm42 at gmail.com (D.Sturm) Date: Fri, 21 Mar 2014 16:17:41 +0100 Subject: [aarch64-port-dev ] cmpxchg and memory barriers Message-ID: Hi, I'm wondering, why is the first instruction in the loop of MacroAssembler::cmpxchg functions an AnyAny memory barrier? As I understand it, an ldxr instruction gives all the memory guarantees of a volatile read, and "stxr; AnyAny" gives the same guarantees as a volatile write. The CAS instruction has the same guarantees as both a volatile read and write. Am I misunderstanding the Aarch64 memory model (or the JMM - I go mostly by http://g.oswego.edu/dl/jmm/cookbook.html) or is the first barrier really superfluous? --Daniel From aph at redhat.com Fri Mar 21 15:44:25 2014 From: aph at redhat.com (Andrew Haley) Date: Fri, 21 Mar 2014 15:44:25 +0000 Subject: [aarch64-port-dev ] RFR: Add support for G1GC In-Reply-To: <1395410346.30081.21.camel@localhost.localdomain> References: <1395139945.16914.4.camel@localhost.localdomain> <53282A21.3080207@redhat.com> <1395410346.30081.21.camel@localhost.localdomain> Message-ID: <532C5E59.9080106@redhat.com> On 03/21/2014 01:59 PM, Edward Nevill wrote: >> What is the commented-out code for? Why is this particular set of registers >> > pushed? > It should be push(r0, r1), the push of rscratch1, rscratch2 is > unnecessary. > > r0 needs to be saved, I also push r1 because it is free and because > I need to save r0..r7 around the call to g1_wb_post later and by > saving r1 here I only have to save r2..r7 later. But why do you not need to save all registers? This is in the middle of C1-generated code, isn't it? So anything may be live. And the native code you're calling may trash these registers. I think you need everything up to r18, excluding rscratch1 and rscratch2. Andrew. From aph at redhat.com Fri Mar 21 16:58:10 2014 From: aph at redhat.com (Andrew Haley) Date: Fri, 21 Mar 2014 16:58:10 +0000 Subject: [aarch64-port-dev ] cmpxchg and memory barriers In-Reply-To: References: Message-ID: <532C6FA2.4060303@redhat.com> On 03/21/2014 03:17 PM, D.Sturm wrote: > I'm wondering, why is the first instruction in the loop of > MacroAssembler::cmpxchg functions an AnyAny memory barrier? > > As I understand it, an ldxr instruction gives all the memory guarantees of > a volatile read, and "stxr; AnyAny" gives the same guarantees as a volatile > write. The CAS instruction has the same guarantees as both a volatile read > and write. > > Am I misunderstanding the Aarch64 memory model (or the JMM - I go mostly by > http://g.oswego.edu/dl/jmm/cookbook.html) or is the first barrier really > superfluous? You're probably right: we know at the moment that we are emitting far too many barriers. This has been the subject of a great deal of discussion and meetings with concurrency gurus. I will fix it as part of a cleanup in this area. Andrew. From D.Sturm42 at gmail.com Fri Mar 21 17:28:40 2014 From: D.Sturm42 at gmail.com (D.Sturm) Date: Fri, 21 Mar 2014 18:28:40 +0100 Subject: [aarch64-port-dev ] cmpxchg and memory barriers In-Reply-To: <532C6FA2.4060303@redhat.com> References: <532C6FA2.4060303@redhat.com> Message-ID: Thanks for the clarification. I'll keep an eye out for all changes in that area.. I can reuse a good deal of it and it's reassuring to say the least if I can just copy code that people who understand all the intricacies of the memory model have blessed. --Daniel On 21 March 2014 17:58, Andrew Haley wrote: > On 03/21/2014 03:17 PM, D.Sturm wrote: > > > I'm wondering, why is the first instruction in the loop of > > MacroAssembler::cmpxchg functions an AnyAny memory barrier? > > > > As I understand it, an ldxr instruction gives all the memory guarantees > of > > a volatile read, and "stxr; AnyAny" gives the same guarantees as a > volatile > > write. The CAS instruction has the same guarantees as both a volatile > read > > and write. > > > > Am I misunderstanding the Aarch64 memory model (or the JMM - I go mostly > by > > http://g.oswego.edu/dl/jmm/cookbook.html) or is the first barrier really > > superfluous? > > You're probably right: we know at the moment that we are emitting far too > many barriers. This has been the subject of a great deal of discussion and > meetings with concurrency gurus. I will fix it as part of a cleanup in > this area. > > Andrew. > > From aph at redhat.com Fri Mar 21 17:34:36 2014 From: aph at redhat.com (Andrew Haley) Date: Fri, 21 Mar 2014 17:34:36 +0000 Subject: [aarch64-port-dev ] cmpxchg and memory barriers In-Reply-To: References: <532C6FA2.4060303@redhat.com> Message-ID: <532C782C.8010704@redhat.com> On 03/21/2014 05:28 PM, D.Sturm wrote: > Thanks for the clarification. > I'll keep an eye out for all changes in that area.. I can reuse a good deal > of it and it's reassuring to say the least if I can just copy code that > people who understand all the intricacies of the memory model have blessed. I'm not sure that any such person exists. Quoth Hans Boehm: As far as I know, the ARMv8 acquire/release operations were designed specifically to act as Java volatile or C++ memory_order_seq_cst load/store operations, without the kind of ordering overkill that we currently need on x86, i.e. they were designed to get us to the "better world". My main remaining concern is that we don't have a complete, much less provably correct, mapping of either Java or C++ atomics to this ISA... Andrew. From D.Sturm42 at gmail.com Fri Mar 21 17:47:23 2014 From: D.Sturm42 at gmail.com (D.Sturm) Date: Fri, 21 Mar 2014 18:47:23 +0100 Subject: [aarch64-port-dev ] cmpxchg and memory barriers In-Reply-To: <532C782C.8010704@redhat.com> References: <532C6FA2.4060303@redhat.com> <532C782C.8010704@redhat.com> Message-ID: Interesting tidbit - shouldn't have been surprised then how nicely acq/rel semantics fit the JMM, but makes sense. Hopefully we'll have some more progress in that area, it's definitely the area in the whole compiler I'm the most at unease about and it's by far the hardest to test (FP behavior is interesting too but we have good tests for it and it's deterministic). -- Daniel On 21 March 2014 18:34, Andrew Haley wrote: > On 03/21/2014 05:28 PM, D.Sturm wrote: > > Thanks for the clarification. > > I'll keep an eye out for all changes in that area.. I can reuse a good > deal > > of it and it's reassuring to say the least if I can just copy code that > > people who understand all the intricacies of the memory model have > blessed. > > I'm not sure that any such person exists. Quoth Hans Boehm: > > As far as I know, the ARMv8 acquire/release operations were > designed specifically to act as Java volatile or C++ > memory_order_seq_cst load/store operations, without the kind of > ordering overkill that we currently need on x86, i.e. they were > designed to get us to the "better world". > > My main remaining concern is that we don't have a complete, much > less provably correct, mapping of either Java or C++ atomics to > this ISA... > > Andrew. > > From ed at camswl.com Sat Mar 22 19:26:45 2014 From: ed at camswl.com (Edward Nevill) Date: Sat, 22 Mar 2014 19:26:45 +0000 Subject: [aarch64-port-dev ] RFR: Add support for G1GC In-Reply-To: <532C5E59.9080106@redhat.com> References: <1395139945.16914.4.camel@localhost.localdomain> <53282A21.3080207@redhat.com> <1395410346.30081.21.camel@localhost.localdomain> <532C5E59.9080106@redhat.com> Message-ID: <1395516405.18312.14.camel@mint> On Fri, 2014-03-21 at 15:44 +0000, Andrew Haley wrote: > On 03/21/2014 01:59 PM, Edward Nevill wrote: > >> What is the commented-out code for? Why is this particular set of registers > >> > pushed? > > It should be push(r0, r1), the push of rscratch1, rscratch2 is > > unnecessary. > > > > r0 needs to be saved, I also push r1 because it is free and because > > I need to save r0..r7 around the call to g1_wb_post later and by > > saving r1 here I only have to save r2..r7 later. > > But why do you not need to save all registers? This is in the middle > of C1-generated code, isn't it? So anything may be live. And the > native code you're calling may trash these registers. I think you need > everything up to r18, excluding rscratch1 and rscratch2. You are correct. I got confused between argument registers and caller save registers which are not the same on aarch64. Thanks for this, you saved me an 'interesting' debugging session! Revised patch below. Tested with jtreg and specjbb2013. OK to push now? Ed. --- CUT HERE --- exporting patch: # HG changeset patch # User Edward Nevill edward.nevill at linaro.org # Date 1395515628 0 # Sat Mar 22 19:13:48 2014 +0000 # Node ID 39075bc8624fa8edd6394c68312e039db359c299 # Parent 9393c177ac9b9407f1f4e58bd662b719b40ded54 Add support for G1GC diff -r 9393c177ac9b -r 39075bc8624f src/cpu/aarch64/vm/aarch64.ad --- a/src/cpu/aarch64/vm/aarch64.ad Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/aarch64.ad Sat Mar 22 19:13:48 2014 +0000 @@ -5112,6 +5112,19 @@ // Store Instructions +// Store CMS card-mark Immediate +instruct storeimmCM0(immI0 zero, memory mem) +%{ + match(Set mem (StoreCM mem zero)); + + ins_cost(MEMORY_REF_COST); + format %{ "strb zr, $mem\t# byte" %} + + ins_encode(aarch64_enc_strb0(mem)); + + ins_pipe(pipe_class_memory); +%} + // Store Byte instruct storeB(iRegI src, memory mem) %{ @@ -5126,6 +5139,7 @@ ins_pipe(pipe_class_memory); %} + instruct storeimmB0(immI0 zero, memory mem) %{ match(Set mem (StoreB mem zero)); diff -r 9393c177ac9b -r 39075bc8624f src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp Sat Mar 22 19:13:48 2014 +0000 @@ -542,14 +542,46 @@ ///////////////////////////////////////////////////////////////////////////// #if INCLUDE_ALL_GCS -void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { Unimplemented(); } +void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { + // At this point we know that marking is in progress. + // If do_load() is true then we have to emit the + // load of the previous value; otherwise it has already + // been loaded into _pre_val. + + __ bind(_entry); + assert(pre_val()->is_register(), "Precondition."); + + Register pre_val_reg = pre_val()->as_register(); + + if (do_load()) { + ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/); + } + __ cbz(pre_val_reg, _continuation); + ce->store_parameter(pre_val()->as_register(), 0); + __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id))); + __ b(_continuation); +} jbyte* G1PostBarrierStub::_byte_map_base = NULL; -jbyte* G1PostBarrierStub::byte_map_base_slow() { Unimplemented(); return 0; } +jbyte* G1PostBarrierStub::byte_map_base_slow() { + BarrierSet* bs = Universe::heap()->barrier_set(); + assert(bs->is_a(BarrierSet::G1SATBCTLogging), + "Must be if we're using this."); + return ((G1SATBCardTableModRefBS*)bs)->byte_map_base; +} -void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { Unimplemented(); } +void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { + __ bind(_entry); + assert(addr()->is_register(), "Precondition."); + assert(new_val()->is_register(), "Precondition."); + Register new_val_reg = new_val()->as_register(); + __ cbz(new_val_reg, _continuation); + ce->store_parameter(addr()->as_pointer_register(), 0); + __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id))); + __ b(_continuation); +} #endif // INCLUDE_ALL_GCS ///////////////////////////////////////////////////////////////////////////// diff -r 9393c177ac9b -r 39075bc8624f src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Sat Mar 22 19:13:48 2014 +0000 @@ -1866,47 +1866,47 @@ void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst) { assert(left->is_single_cpu() || left->is_double_cpu(), "expect single or double register"); - if (left->is_single_cpu()) { - assert (right->is_single_cpu() || right->is_constant(), "single register or constant expected"); - if (right->is_constant() - && Assembler::operand_valid_for_logical_immediate(true, right->as_jint())) { - - switch (code) { - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_jint()); break; - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_jint()); break; - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_jint()); break; - default: ShouldNotReachHere(); break; - } - } else { - switch (code) { - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_register()); break; - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_register()); break; - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_register()); break; - default: ShouldNotReachHere(); break; - } - } - } else { - assert (right->is_double_cpu() || right->is_constant(), "single register or constant expected"); - if (right->is_double_cpu()) { - switch (code) { - case lir_logic_and: __ andr(dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - case lir_logic_or: __ orr (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - case lir_logic_xor: __ eor (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - default: - ShouldNotReachHere(); - break; - } - } - } + Register Rleft = left->is_single_cpu() ? left->as_register() : + left->as_register_lo(); + if (dst->is_single_cpu()) { + Register Rdst = dst->as_register(); + if (right->is_constant()) { + switch (code) { + case lir_logic_and: __ andw (Rdst, Rleft, right->as_jint()); break; + case lir_logic_or: __ orrw (Rdst, Rleft, right->as_jint()); break; + case lir_logic_xor: __ eorw (Rdst, Rleft, right->as_jint()); break; + default: ShouldNotReachHere(); break; + } + } else { + Register Rright = right->is_single_cpu() ? right->as_register() : + right->as_register_lo(); + switch (code) { + case lir_logic_and: __ andw (Rdst, Rleft, Rright); break; + case lir_logic_or: __ orrw (Rdst, Rleft, Rright); break; + case lir_logic_xor: __ eorw (Rdst, Rleft, Rright); break; + default: ShouldNotReachHere(); break; + } + } + } else { + Register Rdst = dst->as_register_lo(); + if (right->is_constant()) { + switch (code) { + case lir_logic_and: __ andr (Rdst, Rleft, right->as_jlong()); break; + case lir_logic_or: __ orr (Rdst, Rleft, right->as_jlong()); break; + case lir_logic_xor: __ eor (Rdst, Rleft, right->as_jlong()); break; + default: ShouldNotReachHere(); break; + } + } else { + Register Rright = right->is_single_cpu() ? right->as_register() : + right->as_register_lo(); + switch (code) { + case lir_logic_and: __ andr (Rdst, Rleft, Rright); break; + case lir_logic_or: __ orr (Rdst, Rleft, Rright); break; + case lir_logic_xor: __ eor (Rdst, Rleft, Rright); break; + default: ShouldNotReachHere(); break; + } + } + } } diff -r 9393c177ac9b -r 39075bc8624f src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Sat Mar 22 19:13:48 2014 +0000 @@ -42,6 +42,9 @@ #include "runtime/vframe.hpp" #include "runtime/vframeArray.hpp" #include "vmreg_aarch64.inline.hpp" +#if INCLUDE_ALL_GCS +#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" +#endif // Implementation of StubAssembler @@ -1148,6 +1151,137 @@ } break; +#if INCLUDE_ALL_GCS + +// Registers to be saved around calls to g1_wb_pre or g1_wb_post +// R0 & R1 have already been saved earlier. R8 & R9 are rscratch1 & rscratch2 +#define G1_SAVE_REGS r2->bit(1)|r3->bit(1)|r4->bit(1)|r5->bit(1)| \ + r6->bit(1)|r7->bit(1)| \ + r10->bit(1)|r11->bit(1)|r12->bit(1)|r13->bit(1)| \ + r14->bit(1)|r15->bit(1)|r16->bit(1)|r17->bit(1) + + case g1_pre_barrier_slow_id: + { + StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); + // arg0 : previous value of memory + + BarrierSet* bs = Universe::heap()->barrier_set(); + if (bs->kind() != BarrierSet::G1SATBCTLogging) { + __ mov(r0, (int)id); + __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), r0); + __ should_not_reach_here(); + break; + } + + const Register pre_val = r0; + const Register thread = rthread; + const Register tmp = rscratch1; + + Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_active())); + + Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + Label done; + Label runtime; + + __ push(r0->bit(1) | r1->bit(1), sp); + // Can we store original value in the thread's buffer? + f.load_argument(0, pre_val); + __ ldr(tmp, queue_index); + __ cbz(tmp, runtime); + + __ sub(tmp, tmp, wordSize); + __ str(tmp, queue_index); + __ ldr(rscratch2, buffer); + __ add(tmp, tmp, rscratch2); + __ str(pre_val, Address(tmp, 0)); + __ b(done); + + __ bind(runtime); + __ push(G1_SAVE_REGS, sp); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread); + __ pop(G1_SAVE_REGS, sp); + __ bind(done); + __ pop(r0->bit(1) | r1->bit(1), sp); + } + break; + case g1_post_barrier_slow_id: + { + StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); + + // arg0: store_address + Address store_addr(rfp, 2*BytesPerWord); + + BarrierSet* bs = Universe::heap()->barrier_set(); + CardTableModRefBS* ct = (CardTableModRefBS*)bs; + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + + Label done; + Label runtime; + + // At this point we know new_value is non-NULL and the new_value crosses regions. + // Must check to see if card is already dirty + + const Register thread = rthread; + + Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + const Register card_addr = rscratch2; + + __ push(r0->bit(1) | r1->bit(1), sp); + f.load_argument(0, card_addr); + __ lsr(card_addr, card_addr, CardTableModRefBS::card_shift); + // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT + // a valid address and therefore is not properly handled by the relocation code. + __ mov(rscratch1, (intptr_t)ct->byte_map_base); + __ add(card_addr, card_addr, rscratch1); + __ ldrb(rscratch1, Address(card_addr, 0)); + __ cmpw(rscratch1, (int)G1SATBCardTableModRefBS::g1_young_card_val()); + __ br(Assembler::EQ, done); + + __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + __ ldrb(rscratch1, Address(card_addr, 0)); + __ cmpw(rscratch1, (int)CardTableModRefBS::dirty_card_val()); + __ br(Assembler::EQ, done); + + // storing region crossing non-NULL, card is clean. + // dirty card and log. + + __ mov(rscratch1, (int)CardTableModRefBS::dirty_card_val()); + __ strb(rscratch1, Address(card_addr, 0)); + + __ ldr(rscratch1, queue_index); + __ cbz(rscratch1, runtime); + __ sub(rscratch1, rscratch1, wordSize); + __ str(rscratch1, queue_index); + + const Register buffer_addr = rscratch2; + + __ push(card_addr->bit(1), sp); + __ ldr(buffer_addr, buffer); + __ add(rscratch1, buffer_addr, rscratch1); + __ pop(card_addr->bit(1), sp); + __ str(card_addr, Address(rscratch1, 0)); + __ b(done); + + __ bind(runtime); + __ push(G1_SAVE_REGS, sp); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); + __ pop(G1_SAVE_REGS, sp); + __ bind(done); + __ pop(r0->bit(1) | r1->bit(1), sp); + + } + break; +#endif + case predicate_failed_trap_id: { StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments); diff -r 9393c177ac9b -r 39075bc8624f src/cpu/aarch64/vm/macroAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Sat Mar 22 19:13:48 2014 +0000 @@ -47,11 +47,12 @@ // #include "runtime/os.hpp" // #include "runtime/sharedRuntime.hpp" // #include "runtime/stubRoutines.hpp" -// #if INCLUDE_ALL_GCS -// #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" -// #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" -// #include "gc_implementation/g1/heapRegion.hpp" -// #endif + +#if INCLUDE_ALL_GCS +#include "gc_implementation/g1/g1CollectedHeap.inline.hpp" +#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" +#include "gc_implementation/g1/heapRegion.hpp" +#endif #ifdef PRODUCT #define BLOCK_COMMENT(str) /* nothing */ @@ -2409,13 +2410,174 @@ Register thread, Register tmp, bool tosca_live, - bool expand_call) { Unimplemented(); } + bool expand_call) { + // If expand_call is true then we expand the call_VM_leaf macro + // directly to skip generating the check by + // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp. + +#ifdef _LP64 + assert(thread == rthread, "must be"); +#endif // _LP64 + + Label done; + Label runtime; + + assert(pre_val != noreg, "check this code"); + + if (obj != noreg) + assert_different_registers(obj, pre_val, tmp); + + Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_active())); + Address index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + + // Is marking active? + if (in_bytes(PtrQueue::byte_width_of_active()) == 4) { + ldrw(tmp, in_progress); + } else { + assert(in_bytes(PtrQueue::byte_width_of_active()) == 1, "Assumption"); + ldrb(tmp, in_progress); + } + cbzw(tmp, done); + + // Do we need to load the previous value? + if (obj != noreg) { + load_heap_oop(pre_val, Address(obj, 0)); + } + + // Is the previous value null? + cbz(pre_val, done); + + // Can we store original value in the thread's buffer? + // Is index == 0? + // (The index field is typed as size_t.) + + ldr(tmp, index); // tmp := *index_adr + cbz(tmp, runtime); // tmp == 0? + // If yes, goto runtime + + sub(tmp, tmp, wordSize); // tmp := tmp - wordSize + str(tmp, index); // *index_adr := tmp + ldr(rscratch1, buffer); + add(tmp, tmp, rscratch1); // tmp := tmp + *buffer_adr + + // Record the previous value + str(pre_val, Address(tmp, 0)); + b(done); + + bind(runtime); + // save the live input values + push(r0->bit(tosca_live) | obj->bit(obj != noreg) | pre_val->bit(true), sp); + + // Calling the runtime using the regular call_VM_leaf mechanism generates + // code (generated by InterpreterMacroAssember::call_VM_leaf_base) + // that checks that the *(rfp+frame::interpreter_frame_last_sp) == NULL. + // + // If we care generating the pre-barrier without a frame (e.g. in the + // intrinsified Reference.get() routine) then ebp might be pointing to + // the caller frame and so this check will most likely fail at runtime. + // + // Expanding the call directly bypasses the generation of the check. + // So when we do not have have a full interpreter frame on the stack + // expand_call should be passed true. + + if (expand_call) { + LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); ) + pass_arg1(this, thread); + pass_arg0(this, pre_val); + MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), 2); + } else { + call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread); + } + + pop(r0->bit(tosca_live) | obj->bit(obj != noreg) | pre_val->bit(true), sp); + + bind(done); +} void MacroAssembler::g1_write_barrier_post(Register store_addr, Register new_val, Register thread, Register tmp, - Register tmp2) { Unimplemented(); } + Register tmp2) { +#ifdef _LP64 + assert(thread == rthread, "must be"); +#endif // _LP64 + + Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + BarrierSet* bs = Universe::heap()->barrier_set(); + CardTableModRefBS* ct = (CardTableModRefBS*)bs; + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + + Label done; + Label runtime; + + // Does store cross heap regions? + + mov(tmp, store_addr); + eor(tmp, tmp, new_val); + lsr(tmp, tmp, HeapRegion::LogOfHRGrainBytes); + cbz(tmp, done); + + // crosses regions, storing NULL? + + cbz(new_val, done); + + // storing region crossing non-NULL, is card already dirty? + + ExternalAddress cardtable((address) ct->byte_map_base); + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + const Register card_addr = tmp; + + mov(card_addr, store_addr); + lsr(card_addr, card_addr, CardTableModRefBS::card_shift); + + unsigned long offset; + adrp(tmp2, cardtable, offset) + + // get the address of the card + add(card_addr, card_addr, tmp2); + ldrb(tmp2, Address(card_addr, offset)); + cmpw(tmp2, (int)G1SATBCardTableModRefBS::g1_young_card_val()); + br(Assembler::EQ, done); + + membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + ldrb(tmp2, Address(card_addr, offset)); + cmpw(tmp2, (int)CardTableModRefBS::dirty_card_val()); + br(Assembler::EQ, done); + + // storing a region crossing, non-NULL oop, card is clean. + // dirty card and log. + + mov(tmp2, (int)CardTableModRefBS::dirty_card_val()); + strb(tmp2, Address(card_addr, offset)); + + ldr(rscratch1, queue_index); + cbz(rscratch1, runtime); + sub(rscratch1, rscratch1, wordSize); + str(rscratch1, queue_index); + + ldr(tmp2, buffer); + add(tmp2, tmp2, rscratch1); + str(card_addr, Address(tmp2, 0)); + b(done); + + bind(runtime); + // save the live input values + push(store_addr->bit(true) | new_val->bit(true), sp); + call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); + pop(store_addr->bit(true) | new_val->bit(true), sp); + + bind(done); +} #endif // INCLUDE_ALL_GCS --- CUt HERE --- From ed at camswl.com Mon Mar 24 16:48:07 2014 From: ed at camswl.com (Edward Nevill) Date: Mon, 24 Mar 2014 16:48:07 +0000 Subject: [aarch64-port-dev ] RFR: Add support for G1GC In-Reply-To: <1395516405.18312.14.camel@mint> References: <1395139945.16914.4.camel@localhost.localdomain> <53282A21.3080207@redhat.com> <1395410346.30081.21.camel@localhost.localdomain> <532C5E59.9080106@redhat.com> <1395516405.18312.14.camel@mint> Message-ID: <1395679687.18312.47.camel@mint> On Sat, 2014-03-22 at 19:26 +0000, Edward Nevill wrote: > Revised patch below. Tested with jtreg and specjbb2013. > > OK to push now? > > Ed. Sorry, this was not my best effort. I have completely reviewed the patch. I have made the following changes. - Use adrp(... cardtable, offset) instead of mov. In order for this to work I had to add a new relocation to pd_patch_instruction to patch the sequence adrp Rx, cardtable, offset add Ry, Ry, Rx ldrb Rz, Address(Ry, offset) - Save R18 and rework the register usage I have reworked the register usage in C1 so we do not need to save R0/R1 in the common case and only need to save registers at all around a call to g1_wb_post or g1_wb_pre. - Utilise the fact that dirty_card_val() == 0 Optimise by using cmpzw and cbz where appropriate in both c1 and template interpreter assert added to check that dirty_card_val() is in fact 0. - Merged several instruction pairs to use 1 instruction instead of 2. Revised patch below. Ed. --- CUT HERE --- exporting patch: # HG changeset patch # User Edward Nevill edward.nevill at linaro.org # Date 1395678909 0 # Mon Mar 24 16:35:09 2014 +0000 # Node ID cc0d7023480e2f60ba13596d1cd44bd6342d4fd1 # Parent 9393c177ac9b9407f1f4e58bd662b719b40ded54 Add support for G1GC diff -r 9393c177ac9b -r cc0d7023480e src/cpu/aarch64/vm/aarch64.ad --- a/src/cpu/aarch64/vm/aarch64.ad Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/aarch64.ad Mon Mar 24 16:35:09 2014 +0000 @@ -5112,6 +5112,19 @@ // Store Instructions +// Store CMS card-mark Immediate +instruct storeimmCM0(immI0 zero, memory mem) +%{ + match(Set mem (StoreCM mem zero)); + + ins_cost(MEMORY_REF_COST); + format %{ "strb zr, $mem\t# byte" %} + + ins_encode(aarch64_enc_strb0(mem)); + + ins_pipe(pipe_class_memory); +%} + // Store Byte instruct storeB(iRegI src, memory mem) %{ @@ -5126,6 +5139,7 @@ ins_pipe(pipe_class_memory); %} + instruct storeimmB0(immI0 zero, memory mem) %{ match(Set mem (StoreB mem zero)); diff -r 9393c177ac9b -r cc0d7023480e src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp Mon Mar 24 16:35:09 2014 +0000 @@ -542,14 +542,46 @@ ///////////////////////////////////////////////////////////////////////////// #if INCLUDE_ALL_GCS -void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { Unimplemented(); } +void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { + // At this point we know that marking is in progress. + // If do_load() is true then we have to emit the + // load of the previous value; otherwise it has already + // been loaded into _pre_val. + + __ bind(_entry); + assert(pre_val()->is_register(), "Precondition."); + + Register pre_val_reg = pre_val()->as_register(); + + if (do_load()) { + ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/); + } + __ cbz(pre_val_reg, _continuation); + ce->store_parameter(pre_val()->as_register(), 0); + __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id))); + __ b(_continuation); +} jbyte* G1PostBarrierStub::_byte_map_base = NULL; -jbyte* G1PostBarrierStub::byte_map_base_slow() { Unimplemented(); return 0; } +jbyte* G1PostBarrierStub::byte_map_base_slow() { + BarrierSet* bs = Universe::heap()->barrier_set(); + assert(bs->is_a(BarrierSet::G1SATBCTLogging), + "Must be if we're using this."); + return ((G1SATBCardTableModRefBS*)bs)->byte_map_base; +} -void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { Unimplemented(); } +void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { + __ bind(_entry); + assert(addr()->is_register(), "Precondition."); + assert(new_val()->is_register(), "Precondition."); + Register new_val_reg = new_val()->as_register(); + __ cbz(new_val_reg, _continuation); + ce->store_parameter(addr()->as_pointer_register(), 0); + __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id))); + __ b(_continuation); +} #endif // INCLUDE_ALL_GCS ///////////////////////////////////////////////////////////////////////////// diff -r 9393c177ac9b -r cc0d7023480e src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Mon Mar 24 16:35:09 2014 +0000 @@ -1866,47 +1866,47 @@ void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst) { assert(left->is_single_cpu() || left->is_double_cpu(), "expect single or double register"); - if (left->is_single_cpu()) { - assert (right->is_single_cpu() || right->is_constant(), "single register or constant expected"); - if (right->is_constant() - && Assembler::operand_valid_for_logical_immediate(true, right->as_jint())) { - - switch (code) { - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_jint()); break; - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_jint()); break; - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_jint()); break; - default: ShouldNotReachHere(); break; - } - } else { - switch (code) { - case lir_logic_and: __ andw (dst->as_register(), left->as_register(), right->as_register()); break; - case lir_logic_or: __ orrw (dst->as_register(), left->as_register(), right->as_register()); break; - case lir_logic_xor: __ eorw (dst->as_register(), left->as_register(), right->as_register()); break; - default: ShouldNotReachHere(); break; - } - } - } else { - assert (right->is_double_cpu() || right->is_constant(), "single register or constant expected"); - if (right->is_double_cpu()) { - switch (code) { - case lir_logic_and: __ andr(dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - case lir_logic_or: __ orr (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - case lir_logic_xor: __ eor (dst->as_register_lo(), left->as_register_lo(), right->as_register_lo()); break; - default: - ShouldNotReachHere(); - break; - } - } else { - switch (code) { - case lir_logic_and: __ andr(dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; - case lir_logic_or: __ orr (dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; - case lir_logic_xor: __ eor (dst->as_register_lo(), left->as_register_lo(), right->as_jlong()); break; - default: - ShouldNotReachHere(); - break; - } - } - } + Register Rleft = left->is_single_cpu() ? left->as_register() : + left->as_register_lo(); + if (dst->is_single_cpu()) { + Register Rdst = dst->as_register(); + if (right->is_constant()) { + switch (code) { + case lir_logic_and: __ andw (Rdst, Rleft, right->as_jint()); break; + case lir_logic_or: __ orrw (Rdst, Rleft, right->as_jint()); break; + case lir_logic_xor: __ eorw (Rdst, Rleft, right->as_jint()); break; + default: ShouldNotReachHere(); break; + } + } else { + Register Rright = right->is_single_cpu() ? right->as_register() : + right->as_register_lo(); + switch (code) { + case lir_logic_and: __ andw (Rdst, Rleft, Rright); break; + case lir_logic_or: __ orrw (Rdst, Rleft, Rright); break; + case lir_logic_xor: __ eorw (Rdst, Rleft, Rright); break; + default: ShouldNotReachHere(); break; + } + } + } else { + Register Rdst = dst->as_register_lo(); + if (right->is_constant()) { + switch (code) { + case lir_logic_and: __ andr (Rdst, Rleft, right->as_jlong()); break; + case lir_logic_or: __ orr (Rdst, Rleft, right->as_jlong()); break; + case lir_logic_xor: __ eor (Rdst, Rleft, right->as_jlong()); break; + default: ShouldNotReachHere(); break; + } + } else { + Register Rright = right->is_single_cpu() ? right->as_register() : + right->as_register_lo(); + switch (code) { + case lir_logic_and: __ andr (Rdst, Rleft, Rright); break; + case lir_logic_or: __ orr (Rdst, Rleft, Rright); break; + case lir_logic_xor: __ eor (Rdst, Rleft, Rright); break; + default: ShouldNotReachHere(); break; + } + } + } } diff -r 9393c177ac9b -r cc0d7023480e src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp Mon Mar 24 16:35:09 2014 +0000 @@ -42,6 +42,9 @@ #include "runtime/vframe.hpp" #include "runtime/vframeArray.hpp" #include "vmreg_aarch64.inline.hpp" +#if INCLUDE_ALL_GCS +#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" +#endif // Implementation of StubAssembler @@ -1148,6 +1151,133 @@ } break; +#if INCLUDE_ALL_GCS + +// Registers to be saved around calls to g1_wb_pre or g1_wb_post +#define G1_SAVE_REGS ((r0->bit(1)|r1->bit(1)| \ + r2->bit(1)|r3->bit(1)|r4->bit(1)|r5->bit(1)| \ + r6->bit(1)|r7->bit(1)|r8->bit(1)|r9->bit(1)| \ + r10->bit(1)|r11->bit(1)|r12->bit(1)|r13->bit(1)| \ + r14->bit(1)|r15->bit(1)|r16->bit(1)|r17->bit(1)| \ + r18->bit(1))&~(rscratch1->bit(1)|rscratch2->bit(1))) + + case g1_pre_barrier_slow_id: + { + StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); + // arg0 : previous value of memory + + BarrierSet* bs = Universe::heap()->barrier_set(); + if (bs->kind() != BarrierSet::G1SATBCTLogging) { + __ mov(r0, (int)id); + __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), r0); + __ should_not_reach_here(); + break; + } + + const Register pre_val = r0; + const Register thread = rthread; + const Register tmp = rscratch1; + + Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_active())); + + Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + Label done; + Label runtime; + + // Can we store original value in the thread's buffer? + __ ldr(tmp, queue_index); + __ cbz(tmp, runtime); + + __ sub(tmp, tmp, wordSize); + __ str(tmp, queue_index); + __ ldr(rscratch2, buffer); + __ add(tmp, tmp, rscratch2); + f.load_argument(0, rscratch2); + __ str(rscratch2, Address(tmp, 0)); + __ b(done); + + __ bind(runtime); + __ push(G1_SAVE_REGS, sp); + f.load_argument(0, pre_val); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread); + __ pop(G1_SAVE_REGS, sp); + __ bind(done); + } + break; + case g1_post_barrier_slow_id: + { + StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); + + // arg0: store_address + Address store_addr(rfp, 2*BytesPerWord); + + BarrierSet* bs = Universe::heap()->barrier_set(); + CardTableModRefBS* ct = (CardTableModRefBS*)bs; + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + + Label done; + Label runtime; + + // At this point we know new_value is non-NULL and the new_value crosses regions. + // Must check to see if card is already dirty + + const Register thread = rthread; + + Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + const Register card_addr = rscratch2; + ExternalAddress cardtable((address) ct->byte_map_base); + + f.load_argument(0, card_addr); + __ lsr(card_addr, card_addr, CardTableModRefBS::card_shift); + unsigned long offset; + __ adrp(rscratch1, cardtable, offset); + __ add(card_addr, card_addr, rscratch1); + __ ldrb(rscratch1, Address(card_addr, offset)); + __ cmpw(rscratch1, (int)G1SATBCardTableModRefBS::g1_young_card_val()); + __ br(Assembler::EQ, done); + + assert((int)CardTableModRefBS::dirty_card_val() == 0, "must be 0"); + + __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + __ ldrb(rscratch1, Address(card_addr, offset)); + __ cbzw(rscratch1, done); + + // storing region crossing non-NULL, card is clean. + // dirty card and log. + __ strb(zr, Address(card_addr, offset)); + + __ ldr(rscratch1, queue_index); + __ cbz(rscratch1, runtime); + __ sub(rscratch1, rscratch1, wordSize); + __ str(rscratch1, queue_index); + + const Register buffer_addr = r0; + + __ push(r0->bit(1) | r1->bit(1), sp); + __ ldr(buffer_addr, buffer); + __ str(card_addr, Address(buffer_addr, rscratch1)); + __ pop(r0->bit(1) | r1->bit(1), sp); + __ b(done); + + __ bind(runtime); + __ push(G1_SAVE_REGS, sp); + __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); + __ pop(G1_SAVE_REGS, sp); + __ bind(done); + + } + break; +#endif + case predicate_failed_trap_id: { StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments); diff -r 9393c177ac9b -r cc0d7023480e src/cpu/aarch64/vm/macroAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Wed Mar 19 16:15:50 2014 +0000 +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Mon Mar 24 16:35:09 2014 +0000 @@ -47,11 +47,12 @@ // #include "runtime/os.hpp" // #include "runtime/sharedRuntime.hpp" // #include "runtime/stubRoutines.hpp" -// #if INCLUDE_ALL_GCS -// #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" -// #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" -// #include "gc_implementation/g1/heapRegion.hpp" -// #endif + +#if INCLUDE_ALL_GCS +#include "gc_implementation/g1/g1CollectedHeap.inline.hpp" +#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" +#include "gc_implementation/g1/heapRegion.hpp" +#endif #ifdef PRODUCT #define BLOCK_COMMENT(str) /* nothing */ @@ -102,14 +103,31 @@ guarantee(Instruction_aarch64::extract(insn, 4, 0) == Instruction_aarch64::extract(insn2, 9, 5), "Registers should be the same"); - } else if (Instruction_aarch64::extract(insn2, 31, 29) == 0b100 - && Instruction_aarch64::extract(insn2, 23, 22) == 0b00) { + } else if (Instruction_aarch64::extract(insn2, 31, 22) == 0b1001000100) { // add (immediate) Instruction_aarch64::patch(branch + sizeof (unsigned), 21, 10, offset_lo); guarantee(Instruction_aarch64::extract(insn, 4, 0) == Instruction_aarch64::extract(insn2, 4, 0), "Registers should be the same"); + } else if (Instruction_aarch64::extract(insn2, 31, 21) == 0b10001011000 + && Instruction_aarch64::extract(insn2, 15, 10) == 0) { + // Handle the cardtable relocation in g1_post_barrier + // __ adrp(Rx, cardtable, offset); + // __ add(Ry, Ry, Rx); + // __ ldrb(Rz, Address(Ry, offset)); + unsigned insn3 = ((unsigned*)branch)[2]; + unsigned size = Instruction_aarch64::extract(insn3, 31, 30); + // The offset must not change becase it is used later in the + // g1_post_barrier code. So we don't patch anything here. + guarantee(Instruction_aarch64::extract(insn3, 21, 10) == (offset_lo >> size), "offset changed"); + guarantee(Instruction_aarch64::extract(insn3, 29, 24) == 0b111001, "must be ldr imm"); + guarantee(Instruction_aarch64::extract(insn, 4, 0) + == Instruction_aarch64::extract(insn2, 20, 16), "Registers must match"); + guarantee(Instruction_aarch64::extract(insn2, 4, 0) + == Instruction_aarch64::extract(insn2, 9, 5), "Registers must match"); + guarantee(Instruction_aarch64::extract(insn2, 4, 0) + == Instruction_aarch64::extract(insn3, 9, 5), "Registers must match"); } else { ShouldNotReachHere(); } @@ -2409,13 +2427,172 @@ Register thread, Register tmp, bool tosca_live, - bool expand_call) { Unimplemented(); } + bool expand_call) { + // If expand_call is true then we expand the call_VM_leaf macro + // directly to skip generating the check by + // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp. + +#ifdef _LP64 + assert(thread == rthread, "must be"); +#endif // _LP64 + + Label done; + Label runtime; + + assert(pre_val != noreg, "check this code"); + + if (obj != noreg) + assert_different_registers(obj, pre_val, tmp); + + Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_active())); + Address index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + + // Is marking active? + if (in_bytes(PtrQueue::byte_width_of_active()) == 4) { + ldrw(tmp, in_progress); + } else { + assert(in_bytes(PtrQueue::byte_width_of_active()) == 1, "Assumption"); + ldrb(tmp, in_progress); + } + cbzw(tmp, done); + + // Do we need to load the previous value? + if (obj != noreg) { + load_heap_oop(pre_val, Address(obj, 0)); + } + + // Is the previous value null? + cbz(pre_val, done); + + // Can we store original value in the thread's buffer? + // Is index == 0? + // (The index field is typed as size_t.) + + ldr(tmp, index); // tmp := *index_adr + cbz(tmp, runtime); // tmp == 0? + // If yes, goto runtime + + sub(tmp, tmp, wordSize); // tmp := tmp - wordSize + str(tmp, index); // *index_adr := tmp + ldr(rscratch1, buffer); + add(tmp, tmp, rscratch1); // tmp := tmp + *buffer_adr + + // Record the previous value + str(pre_val, Address(tmp, 0)); + b(done); + + bind(runtime); + // save the live input values + push(r0->bit(tosca_live) | obj->bit(obj != noreg) | pre_val->bit(true), sp); + + // Calling the runtime using the regular call_VM_leaf mechanism generates + // code (generated by InterpreterMacroAssember::call_VM_leaf_base) + // that checks that the *(rfp+frame::interpreter_frame_last_sp) == NULL. + // + // If we care generating the pre-barrier without a frame (e.g. in the + // intrinsified Reference.get() routine) then ebp might be pointing to + // the caller frame and so this check will most likely fail at runtime. + // + // Expanding the call directly bypasses the generation of the check. + // So when we do not have have a full interpreter frame on the stack + // expand_call should be passed true. + + if (expand_call) { + LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); ) + pass_arg1(this, thread); + pass_arg0(this, pre_val); + MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), 2); + } else { + call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread); + } + + pop(r0->bit(tosca_live) | obj->bit(obj != noreg) | pre_val->bit(true), sp); + + bind(done); +} void MacroAssembler::g1_write_barrier_post(Register store_addr, Register new_val, Register thread, Register tmp, - Register tmp2) { Unimplemented(); } + Register tmp2) { +#ifdef _LP64 + assert(thread == rthread, "must be"); +#endif // _LP64 + + Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_index())); + Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + + PtrQueue::byte_offset_of_buf())); + + BarrierSet* bs = Universe::heap()->barrier_set(); + CardTableModRefBS* ct = (CardTableModRefBS*)bs; + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + + Label done; + Label runtime; + + // Does store cross heap regions? + + eor(tmp, store_addr, new_val); + lsr(tmp, tmp, HeapRegion::LogOfHRGrainBytes); + cbz(tmp, done); + + // crosses regions, storing NULL? + + cbz(new_val, done); + + // storing region crossing non-NULL, is card already dirty? + + ExternalAddress cardtable((address) ct->byte_map_base); + assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); + const Register card_addr = tmp; + + lsr(card_addr, store_addr, CardTableModRefBS::card_shift); + + unsigned long offset; + adrp(tmp2, cardtable, offset); + + // get the address of the card + add(card_addr, card_addr, tmp2); + ldrb(tmp2, Address(card_addr, offset)); + cmpw(tmp2, (int)G1SATBCardTableModRefBS::g1_young_card_val()); + br(Assembler::EQ, done); + + assert((int)CardTableModRefBS::dirty_card_val() == 0, "must be 0"); + + membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + + ldrb(tmp2, Address(card_addr, offset)); + cbzw(tmp2, done); + + // storing a region crossing, non-NULL oop, card is clean. + // dirty card and log. + + strb(zr, Address(card_addr, offset)); + + ldr(rscratch1, queue_index); + cbz(rscratch1, runtime); + sub(rscratch1, rscratch1, wordSize); + str(rscratch1, queue_index); + + ldr(tmp2, buffer); + str(card_addr, Address(tmp2, rscratch1)); + b(done); + + bind(runtime); + // save the live input values + push(store_addr->bit(true) | new_val->bit(true), sp); + call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); + pop(store_addr->bit(true) | new_val->bit(true), sp); + + bind(done); +} #endif // INCLUDE_ALL_GCS --- CUT HERE --- From aph at redhat.com Mon Mar 24 18:33:30 2014 From: aph at redhat.com (Andrew Haley) Date: Mon, 24 Mar 2014 18:33:30 +0000 Subject: [aarch64-port-dev ] RFR: Add support for G1GC In-Reply-To: <1395679687.18312.47.camel@mint> References: <1395139945.16914.4.camel@localhost.localdomain> <53282A21.3080207@redhat.com> <1395410346.30081.21.camel@localhost.localdomain> <532C5E59.9080106@redhat.com> <1395516405.18312.14.camel@mint> <1395679687.18312.47.camel@mint> Message-ID: <53307A7A.1070505@redhat.com> On 03/24/2014 04:48 PM, Edward Nevill wrote: > I have made the following changes. > > - Use adrp(... cardtable, offset) instead of mov. > > In order for this to work I had to add a new relocation to pd_patch_instruction to patch the sequence > > adrp Rx, cardtable, offset > add Ry, Ry, Rx > ldrb Rz, Address(Ry, offset) > > - Save R18 and rework the register usage > > I have reworked the register usage in C1 so we do not need to save R0/R1 in the common case and only need to save registers at all around a call to g1_wb_post or g1_wb_pre. > > - Utilise the fact that dirty_card_val() == 0 > > Optimise by using cmpzw and cbz where appropriate in both c1 and template interpreter > > assert added to check that dirty_card_val() is in fact 0. > > - Merged several instruction pairs to use 1 instruction instead of 2. > > Revised patch below. OK, thanks. Andrew. From ed at camswl.com Mon Mar 24 18:54:44 2014 From: ed at camswl.com (ed at camswl.com) Date: Mon, 24 Mar 2014 18:54:44 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Add support for G1GC Message-ID: <201403241854.s2OIskm0012814@aojmv0008> Changeset: cc0d7023480e Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-24 16:35 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/cc0d7023480e Add support for G1GC ! src/cpu/aarch64/vm/aarch64.ad ! src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp ! src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp ! src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp From openjdk-testing at linaro.org Tue Mar 25 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Tue, 25 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140325120004.9D1A420995@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/084/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 2: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,955; error: 17 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,955; error: 17 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,284; fail: 124; error: 40 Build 1: aarch64/2014/mar/21 pass: 5,285; fail: 123; error: 40 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Tue Mar 25 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Tue, 25 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140325120004.A41362096E@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/084/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 Build 2: aarch64/2014/mar/21 pass: 412; fail: 3; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,949; error: 23 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,946; error: 26 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,271; fail: 130; error: 47 Build 1: aarch64/2014/mar/21 pass: 5,277; fail: 128; error: 43 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From aph at redhat.com Tue Mar 25 13:40:57 2014 From: aph at redhat.com (aph at redhat.com) Date: Tue, 25 Mar 2014 13:40:57 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: 9 new changesets Message-ID: <201403251341.s2PDf5iF014420@aojmv0008> Changeset: 50f803214764 Author: aph Date: 2014-02-25 13:39 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/50f803214764 C1: Generate code for Unsafe fence intrinsics ! src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp ! src/share/vm/c1/c1_LIRGenerator.cpp Changeset: 71329c14d610 Author: aph Date: 2014-03-06 11:57 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/71329c14d610 Merge Changeset: 99924cc3129a Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-11 15:44 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/99924cc3129a Fix problem with field offsets overflowing ! src/cpu/aarch64/vm/aarch64.ad Changeset: 195316ea960f Author: aph Date: 2014-03-20 08:33 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/195316ea960f Backed out changeset 99924cc3129a ! src/cpu/aarch64/vm/aarch64.ad Changeset: dd34c2dac1b8 Author: aph Date: 2014-03-20 10:13 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/dd34c2dac1b8 Comment changes. ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp ! src/cpu/aarch64/vm/macroAssembler_aarch64.hpp Changeset: 846c7ea99134 Author: aph Date: 2014-03-20 13:44 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/846c7ea99134 Correct operand predicates used by load and store operands ! src/cpu/aarch64/vm/aarch64.ad Changeset: cf4cf6a3cb59 Author: aph Date: 2014-03-20 13:46 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/cf4cf6a3cb59 Merge ! src/cpu/aarch64/vm/aarch64.ad ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Changeset: 64468e3180e6 Author: aph Date: 2014-03-20 13:48 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/64468e3180e6 Back out 99924cc3129a again ! src/cpu/aarch64/vm/aarch64.ad Changeset: 08ea774e52a8 Author: aph Date: 2014-03-25 09:40 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/08ea774e52a8 Merge ! src/cpu/aarch64/vm/aarch64.ad ! src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp From ed at camswl.com Tue Mar 25 15:41:36 2014 From: ed at camswl.com (ed at camswl.com) Date: Tue, 25 Mar 2014 15:41:36 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk7u/hotspot: 24 new changesets Message-ID: <201403251541.s2PFfvgE004044@aojmv0008> Changeset: a6537e63b117 Author: adinn Date: 2014-03-10 08:08 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/a6537e63b117 Added tag jdk8_b128_aarch64_992 for changeset e5b35062dee3 ! .hgtags Changeset: 939480aaf1b2 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-11 15:44 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/939480aaf1b2 Fix problem with field offsets overflowing ! src/cpu/aarch64/vm/aarch64.ad Changeset: cb39165c4a65 Author: katleman Date: 2014-02-01 18:21 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/cb39165c4a65 Added tag jdk8-b128 for changeset 874c0b4a946c ! .hgtags Changeset: 1dbaf664a611 Author: katleman Date: 2014-02-06 17:34 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/1dbaf664a611 Added tag jdk8-b129 for changeset cb39165c4a65 ! .hgtags Changeset: b5e7ebfe185c Author: katleman Date: 2014-02-28 10:06 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/b5e7ebfe185c Added tag jdk8-b130 for changeset 1dbaf664a611 ! .hgtags Changeset: 5380dc5d007e Author: katleman Date: 2014-02-28 13:36 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/5380dc5d007e Added tag jdk8-b131 for changeset b5e7ebfe185c ! .hgtags Changeset: 54f0c207dc35 Author: amurillo Date: 2014-01-28 15:11 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/54f0c207dc35 8032984: new hotspot build - hs25-b70 Reviewed-by: jcoomes ! make/hotspot_version Changeset: e46f2ee62e78 Author: vlivanov Date: 2014-03-03 16:10 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/e46f2ee62e78 8036100: Default method returns true for a while, and then returns false Reviewed-by: kvn, jrose ! src/share/vm/ci/ciMethod.cpp + test/compiler/inlining/InlineDefaultMethod1.java Changeset: 9f9179e8f0cf Author: amurillo Date: 2014-03-03 17:48 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/9f9179e8f0cf Merge Changeset: 0c94c41dcd70 Author: amurillo Date: 2014-03-03 17:48 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/0c94c41dcd70 Added tag hs25-b70 for changeset 9f9179e8f0cf ! .hgtags Changeset: 87ee5ee27509 Author: katleman Date: 2014-03-04 11:51 -0800 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/87ee5ee27509 Added tag jdk8-b132 for changeset 0c94c41dcd70 ! .hgtags Changeset: b56e2e46bfe1 Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 10:39 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/b56e2e46bfe1 Merge to jdk8 release tip ! .hgtags ! make/hotspot_version ! src/share/vm/ci/ciMethod.cpp Changeset: 9393c177ac9b Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-19 16:15 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/9393c177ac9b Remove mistaken shift in form_address ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Changeset: cc0d7023480e Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-24 16:35 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/cc0d7023480e Add support for G1GC ! src/cpu/aarch64/vm/aarch64.ad ! src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp ! src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp ! src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Changeset: 50f803214764 Author: aph Date: 2014-02-25 13:39 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/50f803214764 C1: Generate code for Unsafe fence intrinsics ! src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp ! src/share/vm/c1/c1_LIRGenerator.cpp Changeset: 71329c14d610 Author: aph Date: 2014-03-06 11:57 -0500 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/71329c14d610 Merge Changeset: 99924cc3129a Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-11 15:44 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/99924cc3129a Fix problem with field offsets overflowing ! src/cpu/aarch64/vm/aarch64.ad Changeset: 195316ea960f Author: aph Date: 2014-03-20 08:33 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/195316ea960f Backed out changeset 99924cc3129a ! src/cpu/aarch64/vm/aarch64.ad Changeset: dd34c2dac1b8 Author: aph Date: 2014-03-20 10:13 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/dd34c2dac1b8 Comment changes. ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp ! src/cpu/aarch64/vm/macroAssembler_aarch64.hpp Changeset: 846c7ea99134 Author: aph Date: 2014-03-20 13:44 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/846c7ea99134 Correct operand predicates used by load and store operands ! src/cpu/aarch64/vm/aarch64.ad Changeset: cf4cf6a3cb59 Author: aph Date: 2014-03-20 13:46 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/cf4cf6a3cb59 Merge ! src/cpu/aarch64/vm/aarch64.ad ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Changeset: 64468e3180e6 Author: aph Date: 2014-03-20 13:48 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/64468e3180e6 Back out 99924cc3129a again ! src/cpu/aarch64/vm/aarch64.ad Changeset: 08ea774e52a8 Author: aph Date: 2014-03-25 09:40 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/08ea774e52a8 Merge ! src/cpu/aarch64/vm/aarch64.ad ! src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp ! src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Changeset: f50993b6c38d Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-25 14:07 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk7u/hotspot/rev/f50993b6c38d Merge in to tip of aarch64 jdk8 hotspot tree ! .hgtags From D.Sturm42 at gmail.com Wed Mar 26 01:08:22 2014 From: D.Sturm42 at gmail.com (D.Sturm) Date: Wed, 26 Mar 2014 02:08:22 +0100 Subject: [aarch64-port-dev ] Unnecessary branch in MacroAssembler::corrected_idivl Message-ID: Hi, since I'm checking special cases, etc. in the Graal compiler generated code I generally also check the HotSpot code to see if it does equivalent things. Is it actually useful if I report small discrepances where it seems HotSpot generates inefficient code such as the following? Anyhow, since we're already at it - according to the ARMv8 ISA for division: "If a signed integer division (INT_MIN ? -1) is performed, where INT_MIN is the most negative integer value representable in the selected register size, then the result will overflow the signed integer range. No indication of this overflow is produced and the result written to the destination register will be INT_MIN." So the special case for INT_MIN / -1 in MacroAssembler::corrected_idivl is unnecessary since that fits exactly the JLS definition for division. -- Daniel From aph at redhat.com Wed Mar 26 08:29:23 2014 From: aph at redhat.com (Andrew Haley) Date: Wed, 26 Mar 2014 08:29:23 +0000 Subject: [aarch64-port-dev ] Unnecessary branch in MacroAssembler::corrected_idivl In-Reply-To: References: Message-ID: <53328FE3.1010104@redhat.com> Hi, On 03/26/2014 01:08 AM, D.Sturm wrote: > since I'm checking special cases, etc. in the Graal compiler generated code > I generally also check the HotSpot code to see if it does equivalent > things. Is it actually useful if I report small discrepances where it seems > HotSpot generates inefficient code such as the following? Yes, absolutely. Please. > Anyhow, since we're already at it - according to the ARMv8 ISA for division: > "If a signed integer division (INT_MIN ? -1) is performed, where INT_MIN is > the most negative integer value representable in the selected register > size, then the result will overflow the signed integer range. No indication > of this overflow is produced and the result written to the destination > register will be INT_MIN." > > So the special case for INT_MIN / -1 in MacroAssembler::corrected_idivl is > unnecessary since that fits exactly the JLS definition for division. Excellent, thanks. I wrote this code before we had complete specs for ARMv8, so I was being cautious. We need a good way to collect these discrepancies. I'd like to use the OpenJDK jira, but it doesn't allow everyone to create bugs. BTW, I am totally fascinated by your Graal work. It's be great to see what you're doing. Andrew. From aph at redhat.com Wed Mar 26 10:40:41 2014 From: aph at redhat.com (Andrew Haley) Date: Wed, 26 Mar 2014 10:40:41 +0000 Subject: [aarch64-port-dev ] C1: Fix offset overflow when profiling Message-ID: <5332AEA9.6040304@redhat.com> Another offset overflow, revealed during testing. Hopefully, this is the last one. Andrew. # HG changeset patch # User aph # Date 1395830309 14400 # Wed Mar 26 06:38:29 2014 -0400 # Node ID 378b010e4b60a7a6023576001f20155971412b37 # Parent 08ea774e52a8d87ac4536459c2537ecb7e54e30d C1: Fix offset overflow when profiling. diff -r 08ea774e52a8 -r 378b010e4b60 src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Tue Mar 25 09:40:50 2014 -0400 +++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Wed Mar 26 06:38:29 2014 -0400 @@ -1378,12 +1378,14 @@ // Object is null; update MDO and exit Register mdo = klass_RInfo; __ mov_metadata(mdo, md->constant_encoding()); - Address data_addr(mdo, md->byte_offset_of_slot(data, DataLayout::header_offset())); + Address data_addr + = __ form_address(rscratch2, mdo, + md->byte_offset_of_slot(data, DataLayout::DataLayout::header_offset()), + LogBytesPerWord); int header_bits = DataLayout::flag_mask_to_header_mask(BitData::null_seen_byte_constant()); - __ lea(rscratch2, data_addr); - __ ldrw(rscratch1, Address(rscratch2)); - __ orrw(rscratch1, rscratch1, header_bits); - __ strw(rscratch1, Address(rscratch2)); + __ ldr(rscratch1, data_addr); + __ orr(rscratch1, rscratch1, header_bits); + __ str(rscratch1, data_addr); __ b(*obj_is_null); __ bind(not_null); } else { @@ -1455,7 +1457,10 @@ __ bind(profile_cast_failure); __ mov_metadata(mdo, md->constant_encoding()); - Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset())); + Address counter_addr + = __ form_address(rscratch2, mdo, + md->byte_offset_of_slot(data, CounterData::count_offset()), + LogBytesPerWord); __ ldr(rscratch1, counter_addr); __ sub(rscratch1, rscratch1, DataLayout::counter_increment); __ str(rscratch1, counter_addr); @@ -2613,7 +2618,7 @@ __ lea(rscratch2, recv_addr); __ str(rscratch1, Address(rscratch2)); Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))); - __ addptr(counter_addr, DataLayout::counter_increment); + __ addptr(data_addr, DataLayout::counter_increment); return; } } From aph at redhat.com Wed Mar 26 10:40:48 2014 From: aph at redhat.com (aph at redhat.com) Date: Wed, 26 Mar 2014 10:40:48 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: C1: Fix offset overflow when profiling. Message-ID: <201403261040.s2QAen4V028467@aojmv0008> Changeset: 378b010e4b60 Author: aph Date: 2014-03-26 06:38 -0400 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/378b010e4b60 C1: Fix offset overflow when profiling. ! src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp From openjdk-testing at linaro.org Wed Mar 26 14:36:02 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Wed, 26 Mar 2014 14:36:02 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140326143616.5BCBB20998@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/085/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 2: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 2; error: 2 Build 4: aarch64/2014/mar/26 pass: 414; fail: 2; error: 1 1 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,955; error: 17 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,955; error: 17 Build 3: aarch64/2014/mar/25 pass: 2,943; error: 29 Build 4: aarch64/2014/mar/26 pass: 2,960; error: 12 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,284; fail: 124; error: 40 Build 1: aarch64/2014/mar/21 pass: 5,285; fail: 123; error: 40 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Wed Mar 26 14:37:21 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Wed, 26 Mar 2014 14:37:21 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140326143736.BF6D920998@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/085/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 Build 2: aarch64/2014/mar/21 pass: 412; fail: 3; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 3; error: 1 Build 4: aarch64/2014/mar/26 pass: 414; fail: 3 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,949; error: 23 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,946; error: 26 Build 3: aarch64/2014/mar/26 pass: 2,950; error: 22 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,271; fail: 130; error: 47 Build 1: aarch64/2014/mar/21 pass: 5,277; fail: 128; error: 43 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From ed at camswl.com Wed Mar 26 17:22:56 2014 From: ed at camswl.com (Edward Nevill) Date: Wed, 26 Mar 2014 17:22:56 +0000 Subject: [aarch64-port-dev ] Update exclude list to reinstate G1GC tests Message-ID: <1395854576.21089.28.camel@localhost.localdomain> Hi, The following patch updates the JTreg exclude list to reinstate the tests which relied on G1GC. Regards, Ed. --- CUT HERE --- exporting patch: # HG changeset patch # User Edward Nevill edward.nevill at linaro.org # Date 1395854384 0 # Wed Mar 26 17:19:44 2014 +0000 # Node ID e03c59f25d2b8d12d3a4906d72887bfe14494c85 # Parent 3113f753c9712ffad52f37ddcdd0da5eb9492b1c Reinstate tests which use G1GC diff -r 3113f753c971 -r e03c59f25d2b test/exclude_aarch64.txt --- a/test/exclude_aarch64.txt Wed Mar 19 10:34:32 2014 +0000 +++ b/test/exclude_aarch64.txt Wed Mar 26 17:19:44 2014 +0000 @@ -1,8 +1,3 @@ -# Added: Fri Feb 21 2014 -# ---------------------- -# More tests in JDK which use +G1GC -java/lang/management/MemoryMXBean/CollectionUsageThreshold.java generic-all - # Added: Wed Feb 19 2014 # ---------------------- # These tests all use -server on the java command line which causes @@ -12,47 +7,9 @@ compiler/codegen/LoadWithMask2.java generic-all compiler/uncommontrap/UncommonTrapStackBang.java generic-all -# Added: Fri Feb 7 2014 -# ---------------------- -gc/g1/TestHumongousCodeCacheRoots.java generic-all - -# Added: Wed Feb 5 2014 -# ---------------------- -compiler/regalloc/C1ObjectSpillInLogicOp.java generic-all -gc/TestSystemGC.java generic-all -gc/arguments/TestMaxNewSize.java generic-all -gc/g1/TestHumongousAllocInitialMark.java generic-all -runtime/8001071/Test8001071.java generic-all -java/lang/management/MemoryMXBean/ResetPeakMemoryUsage.java generic-all - -# These tests all require the G1 Garbage Collector, which is not -# implemented in the aarch64-port. They are guaranteed to fail. -# Unfortunately, some of them run multiple tests with multiple garbage -# collectors, but as soon as they get to the G1 collector, they abort -# with an Unimplemented assertion. -gc/8000311/Test8000311.java generic-all -gc/arguments/TestAlignmentToUseLargePages.java generic-all -gc/arguments/TestG1HeapRegionSize.java generic-all -gc/arguments/TestG1HeapSizeFlags.java generic-all -gc/arguments/TestMaxHeapSizeTools.java generic-all -gc/arguments/TestUseCompressedOopsErgo.java generic-all -gc/g1/TestPrintGCDetails.java generic-all -gc/g1/TestPrintRegionRememberedSetInfo.java generic-all -gc/g1/TestRegionAlignment.java generic-all -gc/g1/TestShrinkToOneRegion.java generic-all -gc/metaspace/G1AddMetaspaceDependency.java generic-all -gc/metaspace/TestMetaspacePerfCounters.java generic-all -gc/startup_warnings/TestG1.java generic-all -gc/TestG1ZeroPGCTJcmdThreadPrint.java generic-all - # ClassSpaceSize (aka PermGen) is not supported by Java 8 gc/metaspace/CompressedClassSpaceSizeInJmapHeap.java generic-all -# This collector is not implemented for server; for simplicity also ignoring on client tests. -gc/concurrentMarkSweep/CheckAllocateAndSystemGC.java generic-all -gc/concurrentMarkSweep/GuardShrinkWarning.java generic-all -gc/concurrentMarkSweep/SystemGCOnForegroundCollector.java generic-all - # These tests are failing on x86 - so exclude them for the moment gc/metaspace/TestPerfCountersAndMemoryPools.java generic-all runtime/SharedArchiveFile/CdsSameObjectAlignment.java generic-all --- CUT HERE --- From ed at camswl.com Wed Mar 26 17:23:23 2014 From: ed at camswl.com (ed at camswl.com) Date: Wed, 26 Mar 2014 17:23:23 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8: Reinstate tests which use G1GC Message-ID: <201403261723.s2QHNNp8002424@aojmv0008> Changeset: e03c59f25d2b Author: Edward Nevill edward.nevill at linaro.org Date: 2014-03-26 17:19 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/rev/e03c59f25d2b Reinstate tests which use G1GC ! test/exclude_aarch64.txt From D.Sturm42 at gmail.com Wed Mar 26 17:47:48 2014 From: D.Sturm42 at gmail.com (D.Sturm) Date: Wed, 26 Mar 2014 18:47:48 +0100 Subject: [aarch64-port-dev ] Unnecessary branch in MacroAssembler::corrected_idivl In-Reply-To: <53328FE3.1010104@redhat.com> References: <53328FE3.1010104@redhat.com> Message-ID: > > > since I'm checking special cases, etc. in the Graal compiler generated > code > > I generally also check the HotSpot code to see if it does equivalent > > things. Is it actually useful if I report small discrepances where it > seems > > HotSpot generates inefficient code such as the following? > > Yes, absolutely. Please. My pleasure, it's a byproduct of work I have to do anyhow, so I'm glad if it helps a bit. > BTW, I am totally fascinated by your Graal work. It's be great to > see what you're doing. > I was planning to post something here as soon as I had implemented the complete functionality (not withstanding bugs), but if you're interested, this (https://bitbucket.org/voo/aarch64-graal/) is the bitbucket repository. Still missing some "glue" between HotSpot and Graal, but it's going along. It's still based on the b120 branch of the Aarch64 port because that's the latest version that Graal and the Aarch64 port have in common so far (graal went straight from jdk8-b120 to jdk9). -- Daniel From aph at redhat.com Thu Mar 27 08:07:59 2014 From: aph at redhat.com (Andrew Haley) Date: Thu, 27 Mar 2014 08:07:59 +0000 Subject: [aarch64-port-dev ] Offsets in lookupswitch instructions should be signed. Message-ID: <5333DC5F.5010504@redhat.com> A thinko: offsets in lookupswitch instructions are 32-bit signed quantities. I suppose we got away with it so far because Java compilers don't often emit negative offsets. Andrew. # HG changeset patch # User aph # Date 1395907340 0 # Thu Mar 27 08:02:20 2014 +0000 # Node ID f2658ddb105cfbc1ca275609fe71e54d852c0624 # Parent 378b010e4b60a7a6023576001f20155971412b37 Offsets in lookupswitch instructions should be signed. diff -r 378b010e4b60 -r f2658ddb105c src/cpu/aarch64/vm/templateTable_aarch64.cpp --- a/src/cpu/aarch64/vm/templateTable_aarch64.cpp Wed Mar 26 06:38:29 2014 -0400 +++ b/src/cpu/aarch64/vm/templateTable_aarch64.cpp Thu Mar 27 08:02:20 2014 +0000 @@ -2042,8 +2042,8 @@ __ ldrw(j, Address(j, BytesPerInt)); __ profile_switch_case(i, key, array); __ rev32(j, j); - __ load_unsigned_byte(rscratch1, Address(rbcp, j, Address::uxtw(0))); - __ lea(rbcp, Address(rbcp, j, Address::uxtw(0))); + __ load_unsigned_byte(rscratch1, Address(rbcp, j, Address::sxtw(0))); + __ lea(rbcp, Address(rbcp, j, Address::sxtw(0))); __ dispatch_only(vtos); // default case -> j = default offset From openjdk-testing at linaro.org Thu Mar 27 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Thu, 27 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140327120029.79BFC1FCCA@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/086/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 Build 2: aarch64/2014/mar/21 pass: 412; fail: 3; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 3; error: 1 Build 4: aarch64/2014/mar/26 pass: 414; fail: 3 Build 5: aarch64/2014/mar/27 pass: 431; fail: 5; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,949; error: 23 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,946; error: 26 Build 3: aarch64/2014/mar/26 pass: 2,950; error: 22 Build 4: aarch64/2014/mar/27 pass: 2,941; error: 31 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,271; fail: 130; error: 47 Build 1: aarch64/2014/mar/21 pass: 5,277; fail: 128; error: 43 Build 2: aarch64/2014/mar/27 pass: 5,273; fail: 131; error: 46 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Thu Mar 27 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Thu, 27 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140327120032.868371FCBD@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/086/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 2: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 2; error: 2 Build 4: aarch64/2014/mar/26 pass: 414; fail: 2; error: 1 Build 5: aarch64/2014/mar/27 pass: 435; fail: 1; error: 2 ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,955; error: 17 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,955; error: 17 Build 3: aarch64/2014/mar/25 pass: 2,943; error: 29 Build 4: aarch64/2014/mar/26 pass: 2,960; error: 12 Build 5: aarch64/2014/mar/27 pass: 2,941; error: 31 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,284; fail: 124; error: 40 Build 1: aarch64/2014/mar/21 pass: 5,285; fail: 123; error: 40 Build 2: aarch64/2014/mar/27 pass: 5,281; fail: 130; error: 39 2 fatal errors were detected; please follow the link above for more detail. ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From aph at redhat.com Thu Mar 27 14:26:43 2014 From: aph at redhat.com (aph at redhat.com) Date: Thu, 27 Mar 2014 14:26:43 +0000 Subject: [aarch64-port-dev ] hg: aarch64-port/jdk8/hotspot: Offsets in lookupswitch instructions should be signed. Message-ID: <201403271426.s2REQiBu012560@aojmv0008> Changeset: f2658ddb105c Author: aph Date: 2014-03-27 08:02 +0000 URL: http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/f2658ddb105c Offsets in lookupswitch instructions should be signed. ! src/cpu/aarch64/vm/templateTable_aarch64.cpp From openjdk-testing at linaro.org Fri Mar 28 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Fri, 28 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140328120031.9A07F1FD3E@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/087/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 2: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 2; error: 2 Build 4: aarch64/2014/mar/26 pass: 414; fail: 2; error: 1 Build 5: aarch64/2014/mar/27 pass: 435; fail: 1; error: 2 Build 6: aarch64/2014/mar/28 pass: 435; fail: 1; error: 2 ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,955; error: 17 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,955; error: 17 Build 3: aarch64/2014/mar/25 pass: 2,943; error: 29 Build 4: aarch64/2014/mar/26 pass: 2,960; error: 12 Build 5: aarch64/2014/mar/27 pass: 2,941; error: 31 Build 6: aarch64/2014/mar/28 pass: 2,939; error: 33 ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,284; fail: 124; error: 40 Build 1: aarch64/2014/mar/21 pass: 5,285; fail: 123; error: 40 Build 2: aarch64/2014/mar/27 pass: 5,281; fail: 130; error: 39 Build 3: aarch64/2014/mar/28 pass: 5,288; fail: 122; error: 40 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Fri Mar 28 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Fri, 28 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140328120031.A0BF61FCD2@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/087/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 Build 2: aarch64/2014/mar/21 pass: 412; fail: 3; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 3; error: 1 Build 4: aarch64/2014/mar/26 pass: 414; fail: 3 Build 5: aarch64/2014/mar/27 pass: 431; fail: 5; error: 2 Build 6: aarch64/2014/mar/28 pass: 431; fail: 5; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== Build 0: aarch64/2014/mar/19 pass: 2,949; error: 23 Build 1: aarch64/2014/mar/20 pass: 2,939; error: 33 Build 2: aarch64/2014/mar/21 pass: 2,946; error: 26 Build 3: aarch64/2014/mar/26 pass: 2,950; error: 22 Build 4: aarch64/2014/mar/27 pass: 2,941; error: 31 Build 5: aarch64/2014/mar/28 pass: 2,940; error: 32 ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== Build 0: aarch64/2014/mar/20 pass: 5,271; fail: 130; error: 47 Build 1: aarch64/2014/mar/21 pass: 5,277; fail: 128; error: 43 Build 2: aarch64/2014/mar/27 pass: 5,273; fail: 131; error: 46 Build 3: aarch64/2014/mar/28 pass: 5,273; fail: 131; error: 46 ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Sat Mar 29 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sat, 29 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140329120021.B51891FB9D@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/088/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 Build 2: aarch64/2014/mar/21 pass: 412; fail: 3; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 3; error: 1 Build 4: aarch64/2014/mar/26 pass: 414; fail: 3 Build 5: aarch64/2014/mar/27 pass: 431; fail: 5; error: 2 Build 6: aarch64/2014/mar/28 pass: 431; fail: 5; error: 2 Build 7: aarch64/2014/mar/29 pass: 431; fail: 5; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Sat Mar 29 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sat, 29 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140329120020.ACF481FBA7@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/088/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 2: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 2; error: 2 Build 4: aarch64/2014/mar/26 pass: 414; fail: 2; error: 1 Build 5: aarch64/2014/mar/27 pass: 435; fail: 1; error: 2 Build 6: aarch64/2014/mar/28 pass: 435; fail: 1; error: 2 Build 7: aarch64/2014/mar/29 pass: 435; fail: 1; error: 2 ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Sun Mar 30 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sun, 30 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140330120004.65B9B1FBD2@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/089/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 2; error: 1 Build 1: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 2: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 2; error: 2 Build 4: aarch64/2014/mar/26 pass: 414; fail: 2; error: 1 Build 5: aarch64/2014/mar/27 pass: 435; fail: 1; error: 2 Build 6: aarch64/2014/mar/28 pass: 435; fail: 1; error: 2 Build 7: aarch64/2014/mar/29 pass: 435; fail: 1; error: 2 ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Sun Mar 30 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Sun, 30 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140330120004.720291FBC8@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/089/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/19 pass: 413; fail: 3 Build 1: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 Build 2: aarch64/2014/mar/21 pass: 412; fail: 3; error: 2 Build 3: aarch64/2014/mar/25 pass: 413; fail: 3; error: 1 Build 4: aarch64/2014/mar/26 pass: 414; fail: 3 Build 5: aarch64/2014/mar/27 pass: 431; fail: 5; error: 2 Build 6: aarch64/2014/mar/28 pass: 431; fail: 5; error: 2 Build 7: aarch64/2014/mar/29 pass: 431; fail: 5; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Mon Mar 31 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Mon, 31 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] client JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140331120003.E7A421FCB7@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/090/summary.html =============================================================================== client-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/20 pass: 412; fail: 3; error: 2 Build 1: aarch64/2014/mar/21 pass: 412; fail: 3; error: 2 Build 2: aarch64/2014/mar/25 pass: 413; fail: 3; error: 1 Build 3: aarch64/2014/mar/26 pass: 414; fail: 3 Build 4: aarch64/2014/mar/27 pass: 431; fail: 5; error: 2 Build 5: aarch64/2014/mar/28 pass: 431; fail: 5; error: 2 Build 6: aarch64/2014/mar/29 pass: 431; fail: 5; error: 2 ------------------------------------------------------------------------------- =============================================================================== client-fastdebug/langtools =============================================================================== ------------------------------------------------------------------------------- =============================================================================== client-release/jdk =============================================================================== ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From openjdk-testing at linaro.org Mon Mar 31 12:00:01 2014 From: openjdk-testing at linaro.org (OpenJDK Automated Test) Date: Mon, 31 Mar 2014 12:00:01 +0000 (UTC) Subject: [aarch64-port-dev ] server JTREG results for OpenJDK 8 on AArch64 Message-ID: <20140331120003.EA6991F47B@apm4.linaro.org> This is a summary of the JTREG test results for OpenJDK 8 on AArch64. The build and test results are cycled on a weekly basis. For detailed information on the test output please refer to: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/summary/2014/090/summary.html =============================================================================== server-fastdebug/hotspot =============================================================================== Build 0: aarch64/2014/mar/20 pass: 414; fail: 2; error: 1 Build 1: aarch64/2014/mar/21 pass: 413; fail: 2; error: 2 Build 2: aarch64/2014/mar/25 pass: 413; fail: 2; error: 2 Build 3: aarch64/2014/mar/26 pass: 414; fail: 2; error: 1 Build 4: aarch64/2014/mar/27 pass: 435; fail: 1; error: 2 Build 5: aarch64/2014/mar/28 pass: 435; fail: 1; error: 2 Build 6: aarch64/2014/mar/29 pass: 435; fail: 1; error: 2 ------------------------------------------------------------------------------- =============================================================================== server-fastdebug/langtools =============================================================================== ------------------------------------------------------------------------------- =============================================================================== server-release/jdk =============================================================================== ------------------------------------------------------------------------------- Previous results can be found here: http://people.linaro.org/~andrew.mcdermott/openjdk8-jtreg-nightly-tests/index.html From aph at redhat.com Mon Mar 31 14:29:49 2014 From: aph at redhat.com (Andrew Haley) Date: Mon, 31 Mar 2014 15:29:49 +0100 Subject: [aarch64-port-dev ] Unnecessary branch in MacroAssembler::corrected_idivl In-Reply-To: References: Message-ID: <53397BDD.2030506@redhat.com> Hi, On 03/26/2014 01:08 AM, D.Sturm wrote: > since I'm checking special cases, etc. in the Graal compiler generated code > I generally also check the HotSpot code to see if it does equivalent > things. Is it actually useful if I report small discrepances where it seems > HotSpot generates inefficient code such as the following? > > Anyhow, since we're already at it - according to the ARMv8 ISA for division: > "If a signed integer division (INT_MIN ? -1) is performed, where INT_MIN is > the most negative integer value representable in the selected register > size, then the result will overflow the signed integer range. No indication > of this overflow is produced and the result written to the destination > register will be INT_MIN." > > So the special case for INT_MIN / -1 in MacroAssembler::corrected_idivl is > unnecessary since that fits exactly the JLS definition for division. Corrected thusly. Thanks, Andrew. -------------- next part -------------- # HG changeset patch # User aph # Date 1396275626 14400 # Mon Mar 31 10:20:26 2014 -0400 # Node ID e176eb39c5f53127fe18a7e528ca6bc6f0c23cea # Parent f2658ddb105cfbc1ca275609fe71e54d852c0624 Remove special-case handling of division arguments. AArch64 doesn't need it. diff -r f2658ddb105c -r e176eb39c5f5 src/cpu/aarch64/vm/macroAssembler_aarch64.cpp --- a/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Thu Mar 27 08:02:20 2014 +0000 +++ b/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp Mon Mar 31 10:20:26 2014 -0400 @@ -1437,40 +1437,22 @@ int MacroAssembler::corrected_idivl(Register result, Register ra, Register rb, bool want_remainder, Register scratch) { - // Full implementation of Java idiv and irem; checks for special - // case as described in JVM spec., p.243 & p.271. The function - // returns the (pc) offset of the idivl instruction - may be needed + // Full implementation of Java idiv and irem. The function + // returns the (pc) offset of the div instruction - may be needed // for implicit exceptions. // // constraint : ra/rb =/= scratch - // normal case special case + // normal case // - // input : ra: dividend min_long - // rb: divisor -1 + // input : ra: dividend + // rb: divisor // // result: either - // quotient (= ra idiv rb) min_long - // remainder (= ra irem rb) 0 + // quotient (= ra idiv rb) + // remainder (= ra irem rb) assert(ra != scratch && rb != scratch, "reg cannot be scratch"); - static const int64_t min_long = 0x80000000; - Label normal_case, special_case; - - // check for special cases - movw(scratch, min_long); - cmpw(ra, scratch); - br(Assembler::NE, normal_case); - // check for -1 in rb - cmnw(rb, 1); - br(Assembler::NE, normal_case); - if (! want_remainder) - mov(result, ra); - else - mov(result, zr); - b(special_case); - - // handle normal case - bind(normal_case); + int idivl_offset = offset(); if (! want_remainder) { sdivw(result, ra, rb); @@ -1479,49 +1461,28 @@ msubw(result, scratch, rb, ra); } - // normal and special case exit - bind(special_case); - return idivl_offset; } int MacroAssembler::corrected_idivq(Register result, Register ra, Register rb, bool want_remainder, Register scratch) { - // Full implementation of Java idiv and irem; checks for special - // case as described in JVM spec., p.243 & p.271. The function - // returns the (pc) offset of the idivq instruction - may be needed + // Full implementation of Java ldiv and lrem. The function + // returns the (pc) offset of the div instruction - may be needed // for implicit exceptions. // // constraint : ra/rb =/= scratch - // normal case special case + // normal case // - // input : ra: dividend min_long - // rb: divisor -1 + // input : ra: dividend + // rb: divisor // // result: either - // quotient (= ra idiv rb) min_long - // remainder (= ra irem rb) 0 + // quotient (= ra idiv rb) + // remainder (= ra irem rb) assert(ra != scratch && rb != scratch, "reg cannot be scratch"); - static const int64_t min_long = 0x8000000000000000ULL; - Label normal_case, special_case, nonzero; - - // check for special cases - mov(scratch, min_long); - cmp(ra, scratch); - br(Assembler::NE, normal_case); - // check for -1 in rb - cmn(rb, 1); - br(Assembler::NE, normal_case); - if (! want_remainder) - mov(result, ra); - else - mov(result, zr); - b(special_case); - - // handle normal case - bind(normal_case); + int idivq_offset = offset(); if (! want_remainder) { sdiv(result, ra, rb); @@ -1530,9 +1491,6 @@ msub(result, scratch, rb, ra); } - // normal and special case exit - bind(special_case); - return idivq_offset; } From juan.fumero at ed.ac.uk Sun Mar 9 13:23:25 2014 From: juan.fumero at ed.ac.uk (Juan Jose Fumero) Date: Sun, 09 Mar 2014 13:23:25 -0000 Subject: [aarch64-port-dev ] Binutils version for Fedora 20 In-Reply-To: <5319B180.9050201@redhat.com> References: <1394120923.29619.2.camel@guachinche> <5318B1C6.8060101@redhat.com> <5319987B.7060905@redhat.com> <5319A789.6020500@redhat.com> <5319B180.9050201@redhat.com> Message-ID: <1394371385.8987.5.camel@guachinche> Hi, > > Juan, I have pushed this fix to our binutils repo. Could you try > rebuilding with this patch applied? Now everything compiles. Regards Juanjo > > n.b. the easiest way to rebuild is to execute this in your jdk8 tree > > rm -rf ../binutils > rm -rf hotspot/src/share/tools/hsdis > rm -f > build/linux-aarch64-normal-server-slowdebug/images/j2sdk-image/jre/lib/aarch64/hsdis-aarch64.so > bash sim_compile > > the last step will clone the updated binutils repo then rebuild/install > hsdis-aarch64.so > > Meanwhile, I will contact the people who were having problems on Ubuntu > and ask them to report details of the problem they were having. > > regards, > > > Andrew Dinn > ----------- -- The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336.