[aarch64-port-dev ] Use inner shareable versions of memory barriers

[Andrew Haley]

Inner shareable seems to be the preferred version of memory barriers
on this architecture.

Andrew.


# HG changeset patch
# User aph
# Date 1400691624 14400
#      Wed May 21 13:00:24 2014 -0400
# Node ID 5f4d7f52afc875fab4af0c68c3b657a2e8bd7283
# Parent  fe8023ec3b4a44a66daa1b8208f44d1cddb723d4

Use inner shareable versions of memory barriers

diff -r fe8023ec3b4a -r 5f4d7f52afc8 src/cpu/aarch64/vm/assembler_aarch64.hpp
--- a/src/cpu/aarch64/vm/assembler_aarch64.hpp  Mon May 19 09:08:08 2014 -0400
+++ b/src/cpu/aarch64/vm/assembler_aarch64.hpp  Wed May 21 13:00:24 2014 -0400
@@ -1001,13 +1001,13 @@

   // A more convenient access to dmb for our purposes
   enum Membar_mask_bits {
-    StoreStore = ST,
-    LoadStore  = LD,
-    LoadLoad   = LD,
-    // We can use ISH for a full barrier because the ARM ARM says
-    // "This architecture assumes that all Processing Elements that
-    // use the same operating system or hypervisor are in the same
-    // Inner Shareable shareability domain."
+    // We can use ISH for a barrier because the ARM ARM says "This
+    // architecture assumes that all Processing Elements that use the
+    // same operating system or hypervisor are in the same Inner
+    // Shareable shareability domain."
+    StoreStore = ISHST,
+    LoadStore  = ISHLD,
+    LoadLoad   = ISHLD,
     StoreLoad  = ISH,
     AnyAny     = ISH
   };