[aarch64-port-dev ] /hg/icedtea7-forest-aarch64/hotspot: Delete dead code.
Andrew Dinn
adinn at redhat.com
Fri Nov 14 11:48:34 UTC 2014
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Date: Fri, 14 Nov 2014 11:38:51 +0000
Subject: /hg/icedtea7-forest-aarch64/hotspot: Delete dead code.
From: adinn at icedtea.classpath.org
X-Hg-Notification: changeset 0d51d09ef718
Message-Id:
<hg.0d51d09ef718.1415965131.-5017525213744097322 at icedtea.classpath.org>
To: aarch64-port-dev at openjdk.java.net
changeset 0d51d09ef718 in /hg/icedtea7-forest-aarch64/hotspot
details:
http://icedtea.classpath.org/hg/icedtea7-forest-aarch64/hotspot?cmd=changeset;node=0d51d09ef718
author: adinn
date: Fri Nov 14 11:38:48 2014 +0000
Delete dead code.
diffstat:
src/cpu/aarch64/vm/aarch64.ad | 5 -
src/cpu/aarch64/vm/aarch64Test.cpp | 39 -
src/cpu/aarch64/vm/assembler_aarch64.hpp | 31 -
src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp | 4 +-
src/cpu/aarch64/vm/c1_LinearScan_aarch64.cpp | 1208
+---------------
src/cpu/aarch64/vm/c1_LinearScan_aarch64.hpp | 79 +-
src/cpu/aarch64/vm/c1_MacroAssembler_aarch64.cpp | 4 -
src/cpu/aarch64/vm/cppInterpreterGenerator_aarch64.hpp | 22 -
src/cpu/aarch64/vm/interp_masm_aarch64.cpp | 4 -
src/cpu/aarch64/vm/nativeInst_aarch64.cpp | 22 -
src/cpu/aarch64/vm/nativeInst_aarch64.hpp | 17 -
src/cpu/aarch64/vm/register_aarch64.hpp | 38 -
src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp | 5 -
src/cpu/aarch64/vm/stubGenerator_aarch64.cpp | 268 ---
14 files changed, 7 insertions(+), 1739 deletions(-)
diffs (truncated from 2018 to 500 lines):
diff -r 00c0ab788ec5 -r 0d51d09ef718 src/cpu/aarch64/vm/aarch64.ad
--- a/src/cpu/aarch64/vm/aarch64.ad Fri Nov 14 11:34:44 2014 +0000
+++ b/src/cpu/aarch64/vm/aarch64.ad Fri Nov 14 11:38:48 2014 +0000
@@ -804,11 +804,6 @@
//=============================================================================
-// Emit an interrupt that is caught by the debugger (for debugging
compiler).
-void emit_break(CodeBuffer &cbuf) {
- Unimplemented();
-}
-
#ifndef PRODUCT
void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st)
const {
st->print("BREAKPOINT");
diff -r 00c0ab788ec5 -r 0d51d09ef718 src/cpu/aarch64/vm/aarch64Test.cpp
--- a/src/cpu/aarch64/vm/aarch64Test.cpp Fri Nov 14 11:34:44 2014 +0000
+++ b/src/cpu/aarch64/vm/aarch64Test.cpp Fri Nov 14 11:38:48 2014 +0000
@@ -35,43 +35,4 @@
CodeBuffer code(b);
MacroAssembler _masm(&code);
entry(&code);
- // dive now before we hit all the Unimplemented() calls
- // exit(0);
-
-#if 0
- // old test code to compute sum of squares
- enum { r0, r1, r2, r3, r4, LR = 30 };
-
- address entry = __ pc();
-
- __ _mov_imm(r0, 100);
- address loop = __ pc();
- __ _sub_imm(r0, r0, 1);
- __ _cbnz(r0, loop);
- // __ _br(LR);
-
- char stack[4096];
- unsigned long memory[100];
-
- __ _mov_imm(r0, 1);
- __ _mov_imm(r4, 100);
- loop = __ pc();
- __ _mov(r1, r0);
- __ _mul(r2, r1, r1);
- __ _str_post(r2, r3, 8);
- __ _add_imm(r0, r0, 1);
- __ _sub_imm(r4, r4, 1);
- __ _cbnz(r4, loop);
- __ _br(LR);
-
- Disassembler::decode(entry, __ pc());
-
- sim.init((u_int64_t)entry, (u_int64_t)stack + sizeof stack,
- (u_int64_t)stack);
- sim.getCPUState().xreg((GReg)r3, 0) = (u_int64_t)memory;
- sim.run();
- printf("Table of squares:\n");
- for (int i = 0; i < 100; i++)
- printf(" %d\n", memory[i]);
-#endif
}
diff -r 00c0ab788ec5 -r 0d51d09ef718
src/cpu/aarch64/vm/assembler_aarch64.hpp
--- a/src/cpu/aarch64/vm/assembler_aarch64.hpp Fri Nov 14 11:34:44 2014
+0000
+++ b/src/cpu/aarch64/vm/assembler_aarch64.hpp Fri Nov 14 11:38:48 2014
+0000
@@ -1250,12 +1250,6 @@
f(size & 0b01, 31, 30), f(0b011, 29, 27), f(0b00, 25, 24);
long offset = (adr.target() - pc()) >> 2;
sf(offset, 23, 5);
-#if 0
- Relocation* reloc = adr.rspec().reloc();
- relocInfo::relocType rtype = (relocInfo::relocType) reloc->type();
- assert(rtype == relocInfo::internal_word_type,
- "only internal_word_type relocs make sense here");
-#endif
// code_section()->relocate(pc(), adr.rspec());
relocate(pc(), adr.rspec());
return;
@@ -2909,19 +2903,6 @@
void store_check_part_1(Register obj);
void store_check_part_2(Register obj);
- // currently unimplemented
-#if 0
- // C 'boolean' to Java boolean: x == 0 ? 0 : 1
- void c2bool(Register x);
-
- // C++ bool manipulation
-
- void movbool(Register dst, Address src);
- void movbool(Address dst, bool boolconst);
- void movbool(Address dst, Register src);
- void testbool(Register dst);
-#endif
-
// oop manipulations
void load_klass(Register dst, Register src);
void store_klass(Register dst, Register src);
@@ -2932,7 +2913,6 @@
void load_heap_oop_not_null(Register dst, Address src);
void store_heap_oop(Address dst, Register src);
- // currently unimplemented
// Used for storing NULL. All other oop constants should be
// stored using routines that take a jobject.
void store_heap_oop_null(Address dst);
@@ -2957,23 +2937,12 @@
void decode_heap_oop_not_null(Register dst, Register src);
void set_narrow_oop(Register dst, jobject obj);
- // currently unimplemented
-#if 0
- void set_narrow_oop(Address dst, jobject obj);
- void cmp_narrow_oop(Register dst, jobject obj);
- void cmp_narrow_oop(Address dst, jobject obj);
-#endif
// if heap base register is used - reinit it with the correct value
void reinit_heapbase();
DEBUG_ONLY(void verify_heapbase(const char* msg);)
- // currently unimplemented
-#if 0
- void int3();
-#endif
-
void push_CPU_state();
void pop_CPU_state() ;
diff -r 00c0ab788ec5 -r 0d51d09ef718
src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Fri Nov 14 11:34:44
2014 +0000
+++ b/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp Fri Nov 14 11:38:48
2014 +0000
@@ -2723,7 +2723,9 @@
void LIR_Assembler::membar_storeload() { __
membar(MacroAssembler::StoreLoad); }
-void LIR_Assembler::get_thread(LIR_Opr result_reg) { Unimplemented(); }
+void LIR_Assembler::get_thread(LIR_Opr result_reg) {
+ __ mov(result_reg->as_register(), rthread);
+}
void LIR_Assembler::peephole(LIR_List *lir) {
diff -r 00c0ab788ec5 -r 0d51d09ef718
src/cpu/aarch64/vm/c1_LinearScan_aarch64.cpp
--- a/src/cpu/aarch64/vm/c1_LinearScan_aarch64.cpp Fri Nov 14 11:34:44
2014 +0000
+++ b/src/cpu/aarch64/vm/c1_LinearScan_aarch64.cpp Fri Nov 14 11:38:48
2014 +0000
@@ -35,1211 +35,5 @@
//----------------------------------------------------------------------
void LinearScan::allocate_fpu_stack() {
- // First compute which FPU registers are live at the start of each
basic block
- // (To minimize the amount of work we have to do if we have to merge
FPU stacks)
- if (ComputeExactFPURegisterUsage) {
- Interval* intervals_in_register, *intervals_in_memory;
- create_unhandled_lists(&intervals_in_register,
&intervals_in_memory, is_in_fpu_register, NULL);
-
- // ignore memory intervals by overwriting intervals_in_memory
- // the dummy interval is needed to enforce the walker to walk until
the given id:
- // without it, the walker stops when the unhandled-list is empty ->
live information
- // beyond this point would be incorrect.
- Interval* dummy_interval = new Interval(any_reg);
- dummy_interval->add_range(max_jint - 2, max_jint - 1);
- dummy_interval->set_next(Interval::end());
- intervals_in_memory = dummy_interval;
-
- IntervalWalker iw(this, intervals_in_register, intervals_in_memory);
-
- const int num_blocks = block_count();
- for (int i = 0; i < num_blocks; i++) {
- BlockBegin* b = block_at(i);
-
- // register usage is only needed for merging stacks -> compute only
- // when more than one predecessor.
- // the block must not have any spill moves at the beginning
(checked by assertions)
- // spill moves would use intervals that are marked as handled and
so the usage bit
- // would been set incorrectly
-
- // NOTE: the check for number_of_preds > 1 is necessary. A block
with only one
- // predecessor may have spill moves at the begin of the block.
- // If an interval ends at the current instruction id, it is
not possible
- // to decide if the register is live or not at the block
begin -> the
- // register information would be incorrect.
- if (b->number_of_preds() > 1) {
- int id = b->first_lir_instruction_id();
- BitMap regs(FrameMap::nof_fpu_regs);
- regs.clear();
-
- iw.walk_to(id); // walk after the first instruction (always a
label) of the block
- assert(iw.current_position() == id, "did not walk completely to
id");
-
- // Only consider FPU values in registers
- Interval* interval = iw.active_first(fixedKind);
- while (interval != Interval::end()) {
- int reg = interval->assigned_reg();
- assert(reg >= pd_first_fpu_reg && reg <= pd_last_fpu_reg, "no
fpu register");
- assert(interval->assigned_regHi() == -1, "must not have hi
register (doubles stored in one register)");
- assert(interval->from() <= id && id < interval->to(),
"interval out of range");
-
-#ifndef PRODUCT
- if (TraceFPURegisterUsage) {
- tty->print("fpu reg %d is live because of ", reg -
pd_first_fpu_reg); interval->print();
- }
-#endif
-
- regs.set_bit(reg - pd_first_fpu_reg);
- interval = interval->next();
- }
-
- b->set_fpu_register_usage(regs);
-
-#ifndef PRODUCT
- if (TraceFPURegisterUsage) {
- tty->print("FPU regs for block %d, LIR instr %d): ",
b->block_id(), id); regs.print_on(tty); tty->print_cr("");
- }
-#endif
- }
- }
- }
-
-#ifndef TARGET_ARCH_aarch64
- FpuStackAllocator alloc(ir()->compilation(), this);
- _fpu_stack_allocator = &alloc;
- alloc.allocate();
- _fpu_stack_allocator = NULL;
-#endif
+ // No FPU stack on AArch64
}
-
-
-FpuStackAllocator::FpuStackAllocator(Compilation* compilation,
LinearScan* allocator)
- : _compilation(compilation)
- , _lir(NULL)
- , _pos(-1)
- , _allocator(allocator)
- , _sim(compilation)
- , _temp_sim(compilation)
-{}
-
-void FpuStackAllocator::allocate() {
- int num_blocks = allocator()->block_count();
- for (int i = 0; i < num_blocks; i++) {
- // Set up to process block
- BlockBegin* block = allocator()->block_at(i);
- intArray* fpu_stack_state = block->fpu_stack_state();
-
-#ifndef PRODUCT
- if (TraceFPUStack) {
- tty->cr();
- tty->print_cr("------- Begin of new Block %d -------",
block->block_id());
- }
-#endif
-
- assert(fpu_stack_state != NULL ||
- block->end()->as_Base() != NULL ||
- block->is_set(BlockBegin::exception_entry_flag),
- "FPU stack state must be present due to linear-scan order
for FPU stack allocation");
- // note: exception handler entries always start with an empty fpu stack
- // because stack merging would be too complicated
-
- if (fpu_stack_state != NULL) {
- sim()->read_state(fpu_stack_state);
- } else {
- sim()->clear();
- }
-
-#ifndef PRODUCT
- if (TraceFPUStack) {
- tty->print("Reading FPU state for block %d:", block->block_id());
- sim()->print();
- tty->cr();
- }
-#endif
-
- allocate_block(block);
- CHECK_BAILOUT();
- }
-}
-
-void FpuStackAllocator::allocate_block(BlockBegin* block) {
- bool processed_merge = false;
- LIR_OpList* insts = block->lir()->instructions_list();
- set_lir(block->lir());
- set_pos(0);
-
-
- // Note: insts->length() may change during loop
- while (pos() < insts->length()) {
- LIR_Op* op = insts->at(pos());
- _debug_information_computed = false;
-
-#ifndef PRODUCT
- if (TraceFPUStack) {
- op->print();
- }
- check_invalid_lir_op(op);
-#endif
-
- LIR_OpBranch* branch = op->as_OpBranch();
- LIR_Op1* op1 = op->as_Op1();
- LIR_Op2* op2 = op->as_Op2();
- LIR_OpCall* opCall = op->as_OpCall();
-
- if (branch != NULL && branch->block() != NULL) {
- if (!processed_merge) {
- // propagate stack at first branch to a successor
- processed_merge = true;
- bool required_merge = merge_fpu_stack_with_successors(block);
-
- assert(!required_merge || branch->cond() == lir_cond_always,
"splitting of critical edges should prevent FPU stack mismatches at cond
branches");
- }
-
- } else if (op1 != NULL) {
- handle_op1(op1);
- } else if (op2 != NULL) {
- handle_op2(op2);
- } else if (opCall != NULL) {
- handle_opCall(opCall);
- }
-
- compute_debug_information(op);
-
- set_pos(1 + pos());
- }
-
- // Propagate stack when block does not end with branch
- if (!processed_merge) {
- merge_fpu_stack_with_successors(block);
- }
-}
-
-
-void FpuStackAllocator::compute_debug_information(LIR_Op* op) {
- if (!_debug_information_computed && op->id() != -1 &&
allocator()->has_info(op->id())) {
- visitor.visit(op);
-
- // exception handling
- if (allocator()->compilation()->has_exception_handlers()) {
- XHandlers* xhandlers = visitor.all_xhandler();
- int n = xhandlers->length();
- for (int k = 0; k < n; k++) {
- allocate_exception_handler(xhandlers->handler_at(k));
- }
- } else {
- assert(visitor.all_xhandler()->length() == 0, "missed exception
handler");
- }
-
- // compute debug information
- int n = visitor.info_count();
- assert(n > 0, "should not visit operation otherwise");
-
- for (int j = 0; j < n; j++) {
- CodeEmitInfo* info = visitor.info_at(j);
- // Compute debug information
- allocator()->compute_debug_info(info, op->id());
- }
- }
- _debug_information_computed = true;
-}
-
-void FpuStackAllocator::allocate_exception_handler(XHandler* xhandler) {
- if (!sim()->is_empty()) {
- LIR_List* old_lir = lir();
- int old_pos = pos();
- intArray* old_state = sim()->write_state();
-
-#ifndef PRODUCT
- if (TraceFPUStack) {
- tty->cr();
- tty->print_cr("------- begin of exception handler -------");
- }
-#endif
-
- if (xhandler->entry_code() == NULL) {
- // need entry code to clear FPU stack
- LIR_List* entry_code = new LIR_List(_compilation);
- entry_code->jump(xhandler->entry_block());
- xhandler->set_entry_code(entry_code);
- }
-
- LIR_OpList* insts = xhandler->entry_code()->instructions_list();
- set_lir(xhandler->entry_code());
- set_pos(0);
-
- // Note: insts->length() may change during loop
- while (pos() < insts->length()) {
- LIR_Op* op = insts->at(pos());
-
-#ifndef PRODUCT
- if (TraceFPUStack) {
- op->print();
- }
- check_invalid_lir_op(op);
-#endif
-
- switch (op->code()) {
- case lir_move:
- assert(op->as_Op1() != NULL, "must be LIR_Op1");
- assert(pos() != insts->length() - 1, "must not be last
operation");
-
- handle_op1((LIR_Op1*)op);
- break;
-
- case lir_branch:
- assert(op->as_OpBranch()->cond() == lir_cond_always, "must be
unconditional branch");
- assert(pos() == insts->length() - 1, "must be last operation");
-
- // remove all remaining dead registers from FPU stack
- clear_fpu_stack(LIR_OprFact::illegalOpr);
- break;
-
- default:
- // other operations not allowed in exception entry code
- ShouldNotReachHere();
- }
-
- set_pos(pos() + 1);
- }
-
-#ifndef PRODUCT
- if (TraceFPUStack) {
- tty->cr();
- tty->print_cr("------- end of exception handler -------");
- }
-#endif
-
- set_lir(old_lir);
- set_pos(old_pos);
- sim()->read_state(old_state);
- }
-}
-
-
-int FpuStackAllocator::fpu_num(LIR_Opr opr) {
- assert(opr->is_fpu_register() && !opr->is_xmm_register(), "shouldn't
call this otherwise");
- return opr->is_single_fpu() ? opr->fpu_regnr() : opr->fpu_regnrLo();
-}
-
-int FpuStackAllocator::tos_offset(LIR_Opr opr) {
- return sim()->offset_from_tos(fpu_num(opr));
-}
-
-
-LIR_Opr FpuStackAllocator::to_fpu_stack(LIR_Opr opr) {
- assert(opr->is_fpu_register() && !opr->is_xmm_register(), "shouldn't
call this otherwise");
-
- int stack_offset = tos_offset(opr);
- if (opr->is_single_fpu()) {
- return LIR_OprFact::single_fpu(stack_offset)->make_fpu_stack_offset();
- } else {
- assert(opr->is_double_fpu(), "shouldn't call this otherwise");
- return LIR_OprFact::double_fpu(stack_offset)->make_fpu_stack_offset();
- }
-}
-
-LIR_Opr FpuStackAllocator::to_fpu_stack_top(LIR_Opr opr, bool
dont_check_offset) {
- assert(opr->is_fpu_register() && !opr->is_xmm_register(), "shouldn't
call this otherwise");
- assert(dont_check_offset || tos_offset(opr) == 0, "operand is not on
stack top");
-
- int stack_offset = 0;
- if (opr->is_single_fpu()) {
- return LIR_OprFact::single_fpu(stack_offset)->make_fpu_stack_offset();
- } else {
- assert(opr->is_double_fpu(), "shouldn't call this otherwise");
- return LIR_OprFact::double_fpu(stack_offset)->make_fpu_stack_offset();
- }
-}
-
-
-
-void FpuStackAllocator::insert_op(LIR_Op* op) {
- lir()->insert_before(pos(), op);
- set_pos(1 + pos());
-}
-
-
-void FpuStackAllocator::insert_exchange(int offset) {
- if (offset > 0) {
- LIR_Op1* fxch_op = new LIR_Op1(lir_fxch,
LIR_OprFact::intConst(offset), LIR_OprFact::illegalOpr);
- insert_op(fxch_op);
- sim()->swap(offset);
-
-#ifndef PRODUCT
- if (TraceFPUStack) {
- tty->print("Exchanged register: %d New state: ",
sim()->get_slot(0)); sim()->print(); tty->cr();
- }
-#endif
-
- }
-}
-
-void FpuStackAllocator::insert_exchange(LIR_Opr opr) {
- insert_exchange(tos_offset(opr));
-}
-
-
-void FpuStackAllocator::insert_free(int offset) {
- // move stack slot to the top of stack and then pop it
- insert_exchange(offset);
-
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