[aarch64-port-dev ] RFR: JDK8 Use CmpL3 pattern from jdk9 tree

[Edward Nevill]

Hi,

The following patch replaces the CmpL3 pattern in the jdk8 tree with the one from the jdk9 tree.

This is to make the trees more consistent and also the one in the jdk9 tree is more readable.

Built and smoke tested.

OK to push?
Ed.

--- CUT HERE ---
# HG changeset patch
# User Edward Nevill edward.nevill at linaro.org
# Date 1413452656 -3600
#      Thu Oct 16 10:44:16 2014 +0100
# Node ID 3ac6832f79010037f67acd7314143545add91cba
# Parent  89ebbc29144cb6cf9d3d3c55bb65a2162a9dd00a
Replace CmpL3 with version from jdk9 tree

diff -r 89ebbc29144c -r 3ac6832f7901 src/cpu/aarch64/vm/aarch64.ad
--- a/src/cpu/aarch64/vm/aarch64.ad	Mon Oct 13 10:53:11 2014 +0100
+++ b/src/cpu/aarch64/vm/aarch64.ad	Thu Oct 16 10:44:16 2014 +0100
@@ -11051,27 +11051,27 @@
 
 %}
 
-instruct compL3_reg_reg(iRegINoSp dst, iRegL src1, iRegL src2, rFlagsReg cr)
+// Manifest a CmpL result in an integer register.
+// (src1 < src2) ? -1 : ((src1 > src2) ? 1 : 0)
+instruct cmpL3_reg_reg(iRegINoSp dst, iRegL src1, iRegL src2, rFlagsReg flags)
 %{
   match(Set dst (CmpL3 src1 src2));
-  effect(KILL cr);
-  format %{ "cmp $src1, $src2 # CmpL3\n\t"
-            "csinvw $dst, zr, zr, eq\n\t"
-            "csnegw $dst, $dst, $dst, lt"
-  %}
-
-  ins_cost(3 * INSN_COST);
-  ins_encode %{
-    Register d = as_Register($dst$$reg);
-    Register s1 = as_Register($src1$$reg);
-    Register s2 = as_Register($src2$$reg);
-    __ cmp(s1, s2);
-    // installs 0 if EQ else -1
-    __ csinvw(d, zr, zr, Assembler::EQ);
-    // keeps -1 if less else installs 1
-    __ csnegw(d, d, d, Assembler::LT);
-  %}
-   ins_pipe(pipe_class_default);
+  effect(KILL flags);
+
+  ins_cost(INSN_COST * 6);
+  format %{
+      "cmp $src1, $src2"
+      "csetw $dst, ne"
+      "cnegw $dst, lt"
+  %}
+  // format %{ "CmpL3 $dst, $src1, $src2" %}
+  ins_encode %{
+    __ cmp($src1$$Register, $src2$$Register);
+    __ csetw($dst$$Register, Assembler::NE);
+    __ cnegw($dst$$Register, $dst$$Register, Assembler::LT);
+  %}
+
+  ins_pipe(pipe_class_default);
 %}
 
 instruct cmpLTMask_reg_reg(iRegINoSp dst, iRegI p, iRegI q, rFlagsReg cr)
--- CUT HERE ---