[aarch64-port-dev ] Proposed patch for C2 volatile generation (resent)

[Andrew Dinn]

Apologies, the last note included the original rather than the updated
patch.

Attached this time is the latest work in progress -- a slight advance on
the one I was meant to send.

  it modifies the unnecessary_volatile rule to generate a dmb when
UseBarriersForVolatile is true

 it allows for an optional MemBarCPUOrder in the volatile write signature

 it provides two extra predicates needed to avoid generation of
ldar/stlr unless we see the volatile read/write signatures

n.b. The two new predicates are still only stubs in this version. They
don't yet recognise when an unordered store belongs to something other
than a non-volatile load. I should have a complete version ready later
today.

Also, I still need to deal with

  the possibility of a MemBarCPUOrder between the LoadX and
MemBarCPUOVolatile when an unsafe volatile read is inlined

  the possibility of an if-else-then store pair rather than a simple
store in the middle of a volatile write.

regards,


Andrew Dinn
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