[aarch64-port-dev ] RFR: 8131362: aarch64: C2 does not handle large stack offsets

[Edward Nevill]

On Thu, 2015-07-16 at 10:45 +0100, Andrew Haley wrote:
> On 16/07/15 09:46, Edward Nevill wrote:
> > Hi,
> > 
> > 
> > Provides support for large spill offsets in C2 on aarch64.
> A few minor things.
> 
> ~((1<<12)-1)  is just  -1<<12

Fixed.

> 
> I don't like the way that spill_address silently clobbers rscratch2
> and callers of spill_address clobber rscratch1.  This makes me rather
> nervous.  We have had recent bugs which were caused by macros assuming
> they had exclusive use of scratch registers.  Please consider passing
> a destination register down to spill_address and spill_copy128.  I
> think if you do that the register usage will be much clearer to the
> reader.

OK. So what I have done is changed the declaration to have a 'tmp' Register which defaults to rscratch2 as follows:-

Address spill_address(int size, int offset, Register tmp=rscratch2);

That way people can see from the header that it needs a tmp which defaults to rscratch2.

Similarly for spill_copy128 we now have

void spill_copy128(int src_offset, int dst_offset,
                   Register tmp1=rscratch1, Register tmp2=rscratch2)

Is this OK? Or do you want to force people to name the tmp registers on every call.

New webrev.

http://cr.openjdk.java.net/~enevill/8131362/webrev.02

Regards,
Ed.