[aarch64-port-dev ] RFR: Backports from JDK8 to JDK7

Edward Nevill edward.nevill at gmail.com
Tue Nov 3 16:36:58 UTC 2015


Hi,

Please review the following backports from JDK8 to JDK7 (icedtea7-forest).

http://people.linaro.org/~edward.nevill/jdk7-backports-1510

See summary of the changesets below.

Thanks,
Ed.

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changeset:   6378:75d1c4168925
tag:         tip
user:        aph
date:        Tue Sep 29 17:01:37 2015 +0000
files:       src/cpu/aarch64/vm/assembler_aarch64.cpp src/cpu/aarch64/vm/assembler_aarch64.hpp
description:
8138575: Improve generated code for profile counters
Reviewed-by: kvn


changeset:   6377:ad277cc2ef09
user:        aph
date:        Wed Sep 30 13:23:46 2015 +0000
files:       src/cpu/aarch64/vm/c2_globals_aarch64.hpp
description:
8138641: Disable C2 peephole by default for aarch64
Reviewed-by: roland
Contributed-by: felix.yang at linaro.org


changeset:   6376:9739ea27122a
user:        enevill
date:        Wed Sep 16 13:50:57 2015 +0000
files:       src/cpu/aarch64/vm/aarch64.ad
description:
8136615: aarch64: elide DecodeN when followed by CmpP 0
Summary: remove DecodeN when comparing a narrow oop with 0
Reviewed-by: kvn, adinn


changeset:   6375:065c4ead59c3
user:        adinn
date:        Wed Aug 26 17:13:59 2015 +0100
files:       src/cpu/aarch64/vm/aarch64.ad
description:
8134322: AArch64: Fix several errors in C2 biased locking implementation
Summary: Several errors in C2 biased locking require fixing
Reviewed-by: kvn
Contributed-by: hui.shi at linaro.org


changeset:   6374:7b194a9b9fa1
user:        enevill
date:        Thu Aug 20 09:40:08 2015 +0000
files:       src/cpu/aarch64/vm/aarch64.ad src/cpu/aarch64/vm/aarch64_ad.m4
description:
8133842: aarch64: C2 generates illegal instructions with int shifts >=32
Summary: Fix logical operatations combined with shifts >= 32
Reviewed-by: duke
changeset:   6373:027348ed6e01
user:        enevill
date:        Tue Aug 18 12:40:22 2015 +0000
files:       src/cpu/aarch64/vm/assembler_aarch64.cpp src/cpu/aarch64/vm/assembler_aarch64.hpp src/cpu/aarch64/vm/interp_masm_aarch6
4.cpp src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp
description:
8133352: aarch64: generates constrained unpredictable instructions
Summary: Fix generation of unpredictable STXR Rs, Rt, [Rn] with Rs == Rt
Reviewed-by: kvn, aph, adinn


changeset:   6372:25ce0dcaaebe
user:        enevill
date:        Thu Jul 16 14:16:44 2015 +0000
files:       src/cpu/aarch64/vm/assembler_aarch64.cpp src/cpu/aarch64/vm/assembler_aarch64.hpp
description:
8131483: aarch64: illegal stlxr instructions
Summary: Do not generate stlxX with Ws == Xn
Reviewed-by: kvn, aph


changeset:   6371:37ec298f263d
user:        enevill
date:        Wed May 27 09:02:08 2015 +0000
files:       src/cpu/aarch64/vm/globals_aarch64.hpp src/cpu/aarch64/vm/templateTable_aarch64.cpp
description:
8081289: aarch64: add support for RewriteFrequentPairs in interpreter
Summary: Add support for RewriteFrequentPairs
Reviewed-by: roland
Contributed-by: alexander.alexeev at caviumnetworks.com
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