[aarch64-port-dev ] RFR: 8135018: AARCH64: Missing memory barriers for CMS collector

[Dean Long]

I think you should include the GC alias too.  I thought earlier 
discussions decided that
a barrier wasn't needed.  In LIRGenerator::do_StoreIndexed, it looks 
like the barrier is
being done twice, first in store_check, and again in post_barrier. Doing 
it in post_barrier
makes more sense to me than doing it in store_check.

dl

On 9/3/2015 9:08 AM, Andrew Haley wrote:
> C2 has StoreStore barriers in the right place for CMS, but C1 does not
> and neither does the interpreter.  (We need the barriers because
> otherwise the concurrent GC thread might see a card mark with a stale
> null pointer in a field and so not mark a live object.)
>
> This patch adds them where needed.  Note that the patch for C1 adds
> the StoreStore barrier in generic code with no ifdef AARCH64.  My
> reasoning is this: TSO platforms will emit no instructions for
> StoreStore; non-TSO platforms need the StoreStore for correctness.  I
> could #ifdef AARCH64 the code, but it is harmless in TSO and fixes a
> bug in non-TSO.
>
> http://cr.openjdk.java.net/~aph/8135018-1/
>
> Andrew.