[aarch64-port-dev ] RFR: 8135018: AARCH64: Missing memory barriers for CMS collector
Thomas Schatzl
thomas.schatzl at oracle.com
Thu Sep 10 09:22:21 UTC 2015
Hi Andrew,
On Tue, 2015-09-08 at 17:58 +0100, Andrew Haley wrote:
> On 09/08/2015 12:28 PM, Thomas Schatzl wrote:
> > One minor change that may decrease overhead is to make these barriers
> > conditional on CMSPrecleaningEnabled - but then I do not know how much
> > impact that would have. The only web page I ever saw recommending to
> > disable precleaning is some workaround for some bug...
>
> Okay. I've changed the patch to test CMSPrecleaningEnabled in
> c1_LIRGenerator.cpp (which is shared code) and in
> macroAssembler_aarch64.cpp.
>
> In the case of gen_write_ref_array_post_barrier I left it as it was.
> This code always writes the card table regardless of UseCondCardMark,
> and I was slightly concerned that we would be racing with other
> mutator threads. (I now believe this reasoning is really nonsense
> because all we're doing is racing to write zero, but I'm sure it
> doesn't hurt and I feel more comfortable leaving it this way.)
Okay.
> > Not sure if you need a sponsor, but if so, I could do that.
>
> Yes, please. I need someone who will push it through jprt.
>
> http://cr.openjdk.java.net/~aph/8135018-2/
>
one question about a change in c1_LIRGenerator.cpp:
405 assert(state != NULL, "state must be define");
is this change, the removal of the trailing "d" intentional? It seems to
be random.
I could fix this before pushing without a new webrev.
Thanks,
Thomas
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