[aarch64-port-dev ] RFR: 8150394: aarch64: add support for 8.1 LSE CAS instructions

[Edward Nevill]

On Wed, 2016-02-24 at 10:58 +0000, Andrew Haley wrote:
> On 22/02/16 20:32, Edward Nevill wrote:

> And this gets rid of a ton of instruction definitions: we only need
> CAS{A,L,AL}.
> 
> Pass the operand size down to MacroAssembler::cmpxchgw:
> 
>   enc_class aarch64_enc_cmpxchgw(memory mem, iRegINoSp oldval, iRegINoSp newval) %{
>     MacroAssembler _masm(&cbuf);
>     guarantee($mem$$index == -1 && $mem$$disp == 0, "impossible encoding");
>     __ cmpxchg(Assembler::word, $mem$$base$$Register, $oldval$$Register,
>                $newval$$Register,
>                &Assembler::ldxrw, &MacroAssembler::cmpw, &Assembler::stlxrw);
>   %}
> 
> void MacroAssembler::cmpxchgw(operand_size sz, Register oldv,
>                               Register newv, Register addr, Register tmp,
> 			      Label &succeed, Label *fail) {
> 
>   if (UseLSE) {
>     ...
> 
> It'll be necessary to pass a memory barrier flag too.

Hi,

Is this something like what you had in mind?

http://cr.openjdk.java.net/~enevill/8150394/webrev.1/

WRT WeakCompareAndSwap I think it would be better if that went in as a separate change as we will have to backport this to jdk8 and doing it as one change means unpicking it later.

Tested with jcstress with and without -XX:UseLSE

All the best,
Ed.