[aarch64-port-dev ] RFR: 8151775: aarch64: add support for 8.1 LSE atomic operations

[Andrew Haley]

On 03/14/2016 09:06 AM, Edward Nevill wrote:
> The following webrev adds support for 8.1 LSE atomic operations
> 
> http://cr.openjdk.java.net/~enevill/8151775/webrev
> 
> It also adds to CAS cases which I missed in the previous patch for
> 8.1 CAS instructions.
> 
> Tested with a clean run through jcstress.

I'm rejecting most of this patch.

Firstly, the native code is inappropriate at this level.  A runtime
check for UseLSE at every atomic operation is intolerable.  Instead,
please use an appropriately-configured version of GCC and binutils.

I really don't like to see UseLSE in places like the
TemplateInterpreterGenerator and c1_LIRAssembler.  Please define an
appropriate macro for ldadd, swp, (etc.) in MacroAssembler and use it.
In fact, there seem already to be some appropriate definitions
(atomic_add, etc.) in MacroAssembler; I think you could use them.

Like this:

void LIR_Assembler::casl(Register addr, Register newval, Register cmpval) {
  Label succeed;
  __ cmpxchg(addr, cmpval, newval, Assembler::xword, /* acquire*/ true, /* release*/ true, rscratch1);
  __ cset(rscratch1, Assembler::NE);
}

Andrew.