[aarch64-port-dev ] RFR: 8170188: jtreg compiler/types/TestMeetIncompatibleInterfaceArrays.java causes JVM crash

[Sergey Nazarkin]

OK, I see we're speaking about different JDK, I’ referencing to JDK8 from ARRCH64-port project


Sergey Nazarkin




> On 23 Nov 2016, at 18:46, Andrew Haley <aph at redhat.com> wrote:
> 
> On 23/11/16 14:52, Sergey Nazarkin wrote:
> 
>> The issue doesn’t relate to any JIT, runtime fails right at template initialiser
>> 
>> V  [libjvm.so+0x2540d0]  Instruction_aarch64::f(unsigned int, int, int)+0x64
>> V  [libjvm.so+0x255158]  Assembler::f(unsigned int, int, int)+0x30
>> V  [libjvm.so+0x255aa8]  Assembler::ands(RegisterImpl*, RegisterImpl*, unsigned long)+0x7c
>> V  [libjvm.so+0x766c7c]  InterpreterMacroAssembler::increment_mask_and_jump(Address, int, int, Registerp8
> 
> Here is the call to ands:
> 
> void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
>                                                        int increment, Address mask,
>                                                        Register scratch, Register scratch2,
>                                                        bool preloaded, Condition cond,
>                                                        Label* where) {
>  if (!preloaded) {
>    ldrw(scratch, counter_addr);
>  }
>  add(scratch, scratch, increment);
>  strw(scratch, counter_addr);
>  ldrw(scratch2, mask);
>  ands(scratch, scratch, scratch2);
>  br(cond, *where);
> }
> 
> So, the call to ands is not calling ands(Register, Register, unsigned
> long), it is calling ands(Register, Register, Register); or it should
> be.  The wrong method is being called, presumably because method
> overload has failed.
> 
>> V  [libjvm.so+0xb32234]  InterpreterGenerator::generate_counter_incr(Label*, Label*, Label*)+0x1b4
> 
> The backtrace you should see is
> 
> 0xffffb6a554d8 <Instruction_aarch64::zrf(RegisterImpl*, int)+20>:	
> 0xffffb6a56bb4 <Assembler::zrf(RegisterImpl*, int)+20>:
> 0xffffb6a5a46c <Assembler::ands(RegisterImpl*, RegisterImpl*, RegisterImpl*, Assembler::shift_kind, unsigned int)+32>:
> 0xffffb71b3f0c <InterpreterMacroAssembler::increment_mask_and_jump(Address, int, Address, RegisterImpl*, RegisterImpl*, bool, Assembler::Condition, Label*)+188>:	
> 0xffffb76eb168 <TemplateInterpreterGenerator::generate_counter_incr(Label*, Label*, Label*)+888>:
> 0xffffb76ef3b4 <TemplateInterpreterGenerator::generate_normal_entry(bool)+1528>:	
> 0xffffb76e8d94 <TemplateInterpreterGenerator::generate_method_entry(AbstractInterpreter::MethodKind)+452>:
> 
> The VM has been miscompiled.  There is no way that ands should ever
> see (Register, Register, 0).  If there is a problem with an ambiguous
> overload we should see a complaint from the compiler.
> 
> Andrew.