[aarch64-port-dev ] RFR(S): 8154537: AArch64: some integer rotate instructions are never emitted

[Felix Yang]

LGTM. This also addresses:
http://cr.openjdk.java.net/~fyang/8157906/webrev.00/src/cpu/aarch64/vm/aarch64.ad.sdiff.html

Thanks,
Felix

On 29 July 2017 at 01:59, Andrew Haley <aph at redhat.com> wrote:

> I'm looking at the webrev in
> http://cr.openjdk.java.net/~roland/8154537/webrev.00/ and I see the
> the changes were made to aarch64.ad but not to ad_aarch64.m4.  This is
> problematic because some .m4 files are used to generate the .ad file,
> and if anyone regenerates the .ad file the bug will regress.
>
> I think this is the change we need to make.  It won't affect generated
> code at all, but it is something of a ticking bomb.
>
> diff -r 214a94e9366c src/cpu/aarch64/vm/aarch64_ad.m4
> --- a/src/cpu/aarch64/vm/aarch64_ad.m4  Mon Jul 17 12:11:32 2017 +0000
> +++ b/src/cpu/aarch64/vm/aarch64_ad.m4  Fri Jul 28 18:57:25 2017 +0100
> @@ -268,21 +268,21 @@
>    ins_pipe(ialu_reg_reg_vshift);
>  %}')dnl
>  define(ROL_INSN, `
> -instruct $3$1_rReg_Var_C$2(iRegLNoSp dst, iRegL src, iRegI shift, immI$2
> c$2, rFlagsReg cr)
> +instruct $3$1_rReg_Var_C$2(iReg$1NoSp dst, iReg$1 src, iRegI shift,
> immI$2 c$2, rFlagsReg cr)
>  %{
>    match(Set dst (Or$1 (LShift$1 src shift) (URShift$1 src (SubI c$2
> shift))));
>
>    expand %{
> -    $3L_rReg(dst, src, shift, cr);
> +    $3$1_rReg(dst, src, shift, cr);
>    %}
>  %}')dnl
>  define(ROR_INSN, `
> -instruct $3$1_rReg_Var_C$2(iRegLNoSp dst, iRegL src, iRegI shift, immI$2
> c$2, rFlagsReg cr)
> +instruct $3$1_rReg_Var_C$2(iReg$1NoSp dst, iReg$1 src, iRegI shift,
> immI$2 c$2, rFlagsReg cr)
>  %{
>    match(Set dst (Or$1 (URShift$1 src shift) (LShift$1 src (SubI c$2
> shift))));
>
>    expand %{
> -    $3L_rReg(dst, src, shift, cr);
> +    $3$1_rReg(dst, src, shift, cr);
>    %}
>  %}')dnl
>  ROL_EXPAND(L, rol, rorv)
>
> --
> Andrew Haley
> Java Platform Lead Engineer
> Red Hat UK Ltd. <https://www.redhat.com>
> EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671
>