[aarch64-port-dev ] [10] RFR(S): 8186297: AARCH64: Intrinsify Unsafe.compareAndSetByte and compareAndSetShort

[Andrew Dinn]

On 16/08/17 17:33, Andrew Haley wrote:
> On 16/08/17 12:04, dmitrij.pochepko at bell-sw.com wrote:
>
>> WeakCompareAndSwap seems to be already implemented.
> How weird; I wonder how that happened.  OK, the patch is good.

No, please cancel that.

The case statement in is_CAS should not be modified. It is used by the
code which optimizes out dmbs and replaces the stores and loads with
releasing stores and acquiring loads. If you look at the rules for
CopareAndswapI/L/N/P you will see that they come in pairs. Your single
rules do not include the matching pair rule. They will be able to
generate the code that is used when dmb barriers are generated. But the
change to the is_CAS case switch will stop the barriers being generated.
If you revert is_CAS back to what it was then your single rules will be ok.

regards,


Andrew Dinn
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Senior Principal Software Engineer
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