[aarch64-port-dev ] jdk1 Fix for hotspot/test/gc/g1/TestJNIWeakG1/TestJNIWeakG1.java

Ningsheng Jian ningsheng.jian at linaro.org
Thu Aug 17 01:47:34 UTC 2017


Bug: https://bugs.openjdk.java.net/browse/JDK-8186325

Thanks,
Ningsheng

On 17 August 2017 at 01:34, Stuart Monteith <stuart.monteith at linaro.org> wrote:
> Ok,
>   The assert I added to g1_write_barrier_post was tripping - we were
> passing rscratch1 and using it locally. I could just change it to
> rscratch2, but if we are passing temporary registers as parameters,
> I'd argue we shouldn't be using rscratch1, etc, hardcoded in those
> routines. In other platforms we are passing more than two temporary
> registers. I'll have a look at a more extensive change.
>
> BR,
>    Stuart
>
> On 16 August 2017 at 18:13, Stuart Monteith <stuart.monteith at linaro.org> wrote:
>>  In  MacroAssembler::g1_write_barrier_pre I'm thinking:
>>
>> 3644   if (obj != noreg)
>> 3645     assert_different_registers(obj, pre_val, tmp, rscratch1);
>> 3646   else
>> 3647     assert_different_registers(pre_val, tmp, rscratch1);
>>
>> However, I don't understand why that condition would be there and not just:
>>    assert_different_registers(obj, pre_val, tmp, rscratch1);
>> as the other registers ought not to be "noreg" - although there is a
>> separate useful assert for pre_val.
>>
>> On the same principle, would it be acceptable to add the following in
>> the same patch to MacroAssembler::g1_write_barrier_post?
>>
>> I've tried adding the following, but I'll need to get back to you as
>> it might be tripping:
>>     assert_different_registers(store_addr, new_val, thread, tmp, tmp2,
>> rscratch1);
>>
>> BR,
>>    Stuart
>>
>>
>>
>>
>> On 16 August 2017 at 17:39, Andrew Haley <aph at redhat.com> wrote:
>>> On 16/08/17 12:34, Stuart Monteith wrote:
>>>> There was a bug introduced by "8176100 G1 Need prebarrier on deference
>>>> of weak JNI handles" where a rscratch1 is being passed to
>>>> g1_write_barrier_pre where it is already using rscratch1. This causes
>>>> the TestJNIWeakG1 testcase to SIGSEGV as the temporary register is
>>>> being used fro two conflicting purposes.
>>>
>>> We need an assert to make sure this doesn't happen again.
>>>
>>> --
>>> Andrew Haley
>>> Java Platform Lead Engineer
>>> Red Hat UK Ltd. <https://www.redhat.com>
>>> EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671


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