[aarch64-port-dev ] [RFC] ldp/stp peephole optimizations

[Zhongwei Yao]

Hi, Andrew,

Thanks for your review!

On 23 December 2017 at 00:02, Andrew Haley <aph at redhat.com> wrote:
> Hi,
>
> On 22/12/17 08:02, Zhongwei Yao wrote:
>
>> My draft patch to address B) is at:
>>   http://cr.openjdk.java.net/~zyao/RFC_B/
>>
>> What do you think? Welcome any feedback!
>
> I wonder if merging ld/st pairs could be handled by the
> MacroAssembler.

I was also thinking about merging it in assembler. My concern was that
assembler usually does not do optimisation.

However, I've taken a quick check and I think it should be doable in
assembler. For example, we can merge ldr in assembler's ldr instruct
definition by checking if the previous instruct meets the constraints.
For the previous instruction, we can record it in Instruction_aarch64
class's destructor (if it is ld/st instruction, record it. if not,
clear it.).

What do you think? If it is OK, I'll work out a prototype for merging
ldr in assembler.


>MachSpillCopyNode::peephole looks very complicated.
> If you handled ldp/stp conversion in MacroAssembler then it'd work
> everywhere, for any adjacent pair of loads or stores, not just for
> spills in C2.
>
> --
> Andrew Haley
> Java Platform Lead Engineer
> Red Hat UK Ltd. <https://www.redhat.com>
> EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671



-- 
Best regards,
Zhongwei