[aarch64-port-dev ] [10] RFR: 8187472 - AARCH64: array_equals intrinsic doesn't use prefetch for large arrays

[Dmitrij Pochepko]

On 10.11.2017 17:28, Andrew Haley wrote:
> On 10/11/17 14:19, Dmitrij Pochepko wrote:
>
>> please take a look at merged simd/non-simd version.
> +    if (UseSIMDForArrayEquals) {
> +      __ ld1(v0, v1, v2, v3, __ T2D, Address(__ post(a1, 64)));
> +      __ ld1(v4, v5, v6, v7, __ T2D, Address(__ post(a2, 64)));
>
> Is this post-increment correct?  It should be a multiple of wordSize.
It's correct, since we're loading 4x128-bit registers, which is 64 
bytes. But I've changed it to "4 * 2 * wordSize", which has the same value.
>
> Also, the indentation in generate_large_array_equals is wrong.
>
Thank you for noticing it.

Please take a look at 
http://cr.openjdk.java.net/~dpochepk/8187472/webrev.03/


Thanks,
Dmitrij