[aarch64-port-dev ] Caller registers protection inside loop hurts performance

[Andrew Haley]

On 08/15/2018 05:30 AM, Patrick Zhang wrote:
> To compare with another port, perhaps because of having more registers to use, aarch64 has to protect more in this code snippet than that of x86, say (5 load + 5 store) vs (4 load + 2 store), almost doubled, so the performance is worse accordingly.

I would not expect that to be true.  The saved registers are those in use.

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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