[aarch64-port-dev ] [Roland Westrelin] Re: Aarch64 port for ZGC, so far
Stuart Monteith
stuart.monteith at linaro.org
Mon Dec 3 11:42:53 UTC 2018
Hello Roland,
I ran SPECjbb to completion with your patch, so it appears ok. I
intend on running with jtreg, so I'll report how that goes.
Which two cas do you mean are the same? the
ConcurrentLinkedQueue.offer methods has two compare and swaps on
objects, one weak and the other not.
In the C2Barrier the barrier are both not weak, as far as I can tell.
Thanks Roland.
On Fri, 30 Nov 2018 at 14:32, Roland Westrelin <rwestrel at redhat.com> wrote:
>
>
> Hi Stuart,
>
> Can you try the attached patch on top of the previous one?
>
> The problem is that the second cas is not always of the same type as the
> first one (it's always a CompareAndSwap when the first one can be a
> WeakCompareAndSwap for instance). That breaks the new zgc logic in
> LoadStoreNode::trailing_membar() but also in the ad file: the type of
> the cas is used as an indication of whether a trailing barrier is
> there. Given the types of the 2 cas for zgc can differ, that logic gets
> confused.
>
> The fix uses the same type of cas for the second one which I assume is
> correct?
>
> Roland.
>
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