[aarch64-port-dev ] Aarch64 port for ZGC, so far

[Andrew Haley]

On 11/30/18 10:58 AM, Per Liden wrote:

> On 11/30/18 11:23 AM, Andrew Haley wrote:
>> On 11/30/18 10:15 AM, Andrew Haley wrote:
>>> On 11/30/18 1:53 AM, White, Derek wrote:
>>>> cpu/aarch64/assembler_aarch64.cpp:
>>>> cpu/aarch64/c1_LIRAssembler_aarch64.cpp:
>>>>   - Address::lea() & LIR_Assembler::leal():
>>>
>>> I don't think this is necessary. The address of ZAddressBadMask is a
>>> constant once the program is loaded so don't really need a reloc at
>>> all.
> 
> The need for a patchable lea is not because of ZAddressBadMask, but 
> because of unknown field offsets in not yet loaded classes. See JDK-8202976.
> 
>> The current code for leal() looks like this:
>>
>> void LIR_Assembler::leal(LIR_Opr addr, LIR_Opr dest) {
>>    __ lea(dest->as_register_lo(), as_Address(addr->as_address_ptr()));
>> }
>>
>> There's something very wrong with this patch. It's not needed
>> anywhere else, so it shouldn't be needed for ZGC.
>>
> 
> Hmm, are you perhaps looking at a JDK8 repo or something? It looks like 
> this in jdk/jdk:
> 
> void LIR_Assembler::leal(LIR_Opr addr, LIR_Opr dest, LIR_PatchCode 
> patch_code, CodeEmitInfo* info) {
>    assert(patch_code == lir_patch_none, "Patch code not supported");
>    __ lea(dest->as_register_lo(), as_Address(addr->as_address_ptr()));
> }

Ah, yes. The "Add C1 lea patching support for x86" patch.

OK, no problem. We deoptimize for C1 patching, so this shouldn't affect us.

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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