[aarch64-port-dev ] RFR: aarch64: minor improvements of atomic operations

Yangfei (Felix) felix.yang at huawei.com
Tue Nov 5 06:20:40 UTC 2019


Hi,

Please review this small improvements of aarch64 atomic operations.
This eliminates the use of full memory barriers.
Passed tier1-3 testing.


Patch:

diff -r 2700c409ff10 src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp
--- a/src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp Sun Nov 03 18:02:29 2019 -0500
+++ b/src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp Wed Nov 06 14:13:00 2019 +0800
@@ -40,8 +40,7 @@
{
   template<typename I, typename D>
   D add_and_fetch(I add_value, D volatile* dest, atomic_memory_order order) const {
-    D res = __atomic_add_fetch(dest, add_value, __ATOMIC_RELEASE);
-    FULL_MEM_BARRIER;
+    D res = __atomic_add_fetch(dest, add_value, __ATOMIC_ACQ_REL);
     return res;
   }
};
@@ -52,8 +51,7 @@
                                                      T volatile* dest,
                                                      atomic_memory_order order) const {
   STATIC_ASSERT(byte_size == sizeof(T));
-  T res = __sync_lock_test_and_set(dest, exchange_value);
-  FULL_MEM_BARRIER;
+  T res = __atomic_exchange_n(dest, exchange_value, __ATOMIC_ACQ_REL);
   return res;
}


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