[aarch64-port-dev ] RFR: aarch64: minor improvements of atomic operations

[Erik Österlund]

Hi Felix,

Would uou mind pasting a link to the proposed change? I can not determine its validity otherwise.

Thanks,
/Erik

> On 11 Nov 2019, at 13:01, Yangfei (Felix) <felix.yang at huawei.com> wrote:
> 
> 
>> 
>> -----Original Message-----
>> From: Andrew Haley [mailto:aph at redhat.com]
>> Sent: Monday, November 11, 2019 7:17 PM
>> To: Yangfei (Felix) <felix.yang at huawei.com>;
>> aarch64-port-dev at openjdk.java.net
>> Subject: Re: [aarch64-port-dev ] RFR: aarch64: minor improvements of atomic
>> operations
>> 
>>> On 11/5/19 6:20 AM, Yangfei (Felix) wrote:
>>> Please review this small improvements of aarch64 atomic operations.
>>> This eliminates the use of full memory barriers.
>>> Passed tier1-3 testing.
>> 
>> No, rejected.
>> 
>> Patch also must go to hotspot-dev.
> 
> CCing to hotspot-dev.  
> 
>> Are you sure this is safe? The HotSpot internal barriers are specified as being
>> full two-way barriers, which these are not. Tier1 testing really isn't going to do
>> it. Now, you might argue that none of the uses in HotSpot actually require
>> anything stronger that acq/rel, but good luck proving that.
> 
> I was also curious about the reason why full memory barrier is used here.  
> For add_and_fetch, I was thinking that there is no difference in functionality for the following two code snippet.  
> It's interesting to know that this may make a difference.  Can you elaborate more on that please?  
> 
> 1) without patch
> .L2:
>        ldxr    x2, [x1]
>        add     x2, x2, x0
>        stlxr   w3, x2, [x1]
>        cbnz    w3, .L2
>        dmb     ish
>        mov     x0, x2
>        ret
> -----------------------------------------------
> 2) with patch
> .L2:
>        ldaxr   x2, [x1]
>        add     x2, x2, x0
>        stlxr   w3, x2, [x1]
>        cbnz    w3, .L2
>        mov     x0, x2
>        ret