[aarch64-port-dev ] RFR: 8165404: AArch64: Implement SHA512 accelerator/intrinsic

[Yangfei (Felix)]

P.S., I witnessed some random assembler warnings when  executing aarch64-asmtest.py script.

$ python ./src/hotspot/cpu/aarch64/aarch64-asmtest.py | grep Warning
aarch64ops.s: Assembler messages:
aarch64ops.s:424: Warning: unpredictable load of register pair -- `ldpsw x10,x10,[x9,#-32]'
aarch64ops.s:428: Warning: unpredictable transfer with writeback -- `stp w30,w12,[x30,#-256]!'
aarch64ops.s:435: Warning: unpredictable transfer with writeback -- `ldp w4,w23,[x4],#-112'
aarch64ops.s:221: Warning: unpredictable transfer with writeback -- `str x6,[x6,11]!'
aarch64ops.s:223: Warning: unpredictable transfer with writeback -- `strb w0,[x0,-8]!'

I think we should avoid this kind of noise.  This could be fixed by the following fix:

diff -r ff84f0491003 src/hotspot/cpu/aarch64/aarch64-asmtest.py
--- a/src/hotspot/cpu/aarch64/aarch64-asmtest.py        Sat Aug 15 18:13:49 2020 -0700
+++ b/src/hotspot/cpu/aarch64/aarch64-asmtest.py        Mon Aug 17 09:40:12 2020 +0800
@@ -741,6 +741,11 @@

         regMode = FloatRegister if isFloat else GeneralRegister
         self.reg = regMode().generate()
+
+        kindStr = Address.kindToStr(self.kind);
+        if (not isFloat) and (kindStr is "pre" or kindStr is "post"):
+            (self.reg.number, self.adr.base.number) = random.sample(range(31), 2)
+
         return self

     def cstr(self):
@@ -777,6 +782,16 @@
           self.reg = [OperandFactory.create(self.mode).generate()
                       for i in range(self.numRegs)]
           self.base = OperandFactory.create('x').generate()
+
+          kindStr = Address.kindToStr(self.kind);
+          if kindStr is "pre" or kindStr is "post":
+              if self._name.startswith("ld"):
+                  (self.reg[0].number, self.reg[1].number, self.base.number) = random.sample(range(31), 3)
+              if self._name.startswith("st"):
+                  self.base.number = random.choice(list(set(range(31)) - set([self.reg[0].number, self.reg[1].number])))
+          elif self._name.startswith("ld"):
+              (self.reg[0].number, self.reg[1].number) = random.sample(range(31), 2)
+
           return self

      def astr(self):


> -----Original Message-----
> From: Yangfei (Felix)
> Sent: Friday, August 7, 2020 2:20 PM
> To: 'Andrew Haley' <aph at redhat.com>; hotspot-runtime-
> dev at openjdk.java.net
> Cc: aarch64-port-dev at openjdk.java.net
> Subject: RE: RFR: 8165404: AArch64: Implement SHA512 accelerator/intrinsic
> 
> Hi,
> 
> > -----Original Message-----
> > From: Andrew Haley [mailto:aph at redhat.com]
> > Sent: Thursday, August 6, 2020 7:42 PM
> > To: Yangfei (Felix) <felix.yang at huawei.com>; hotspot-runtime-
> > dev at openjdk.java.net
> > Cc: aarch64-port-dev at openjdk.java.net
> > Subject: Re: RFR: 8165404: AArch64: Implement SHA512
> > accelerator/intrinsic
> >
> > On 8/6/20 2:13 AM, Yangfei (Felix) wrote:
> > > I have added tests for sha512 crypto instructions in this script and
> > regenerated the code.
> > > Tier1-3 tested with an aarch64 fastdebug build on my aarch64 linux
> > > host to
> > cover this part.
> > > Updated webrev:
> http://cr.openjdk.java.net/~fyang/8165404/webrev.02/
> > > Is it OK?
> >
> > Yes, thanks.
> >
> > It's a bit annoying that the indentation seems to change so
> > frequently. I'm wondering if perhaps some people have been running
> > this on Windows, which has different tab sizes, but that seems very
> > unlikely, given that this is a Linux port. But never mind, that's not your
> problem.
> 
> I see the output of the python script contains tabs which is not allowed by
> jcheck.
> So I guess it may depends on the way in which people substitute these tabs.
> I used vim editor to do the replacement, which is simple.
> Open the file which contains the script output and do:
> 
> :set ts=8
> :set expandtab
> :%retab!
> 
> Looks like the indentation is more consistent this way.  Hope that helps.
> Pushed as: https://hg.openjdk.java.net/jdk/jdk/rev/09ad5b67a099
> 
> Thanks,
> Felix