[aarch64-port-dev ] RFR: 8165404: AArch64: Implement SHA512 accelerator/intrinsic

[Yangfei (Felix)]

Hi,

> -----Original Message-----
> From: Andrew Haley [mailto:aph at redhat.com]
> Sent: Monday, August 17, 2020 4:33 PM
> To: Yangfei (Felix) <felix.yang at huawei.com>; hotspot-runtime-
> dev at openjdk.java.net
> Cc: aarch64-port-dev at openjdk.java.net
> Subject: Re: RFR: 8165404: AArch64: Implement SHA512 accelerator/intrinsic
> 
> On 17/08/2020 03:07, Yangfei (Felix) wrote:
> > P.S., I witnessed some random assembler warnings when  executing
> aarch64-asmtest.py script.
> >
> > $ python ./src/hotspot/cpu/aarch64/aarch64-asmtest.py | grep Warning
> > aarch64ops.s: Assembler messages:
> > aarch64ops.s:424: Warning: unpredictable load of register pair -- `ldpsw
> x10,x10,[x9,#-32]'
> > aarch64ops.s:428: Warning: unpredictable transfer with writeback -- `stp
> w30,w12,[x30,#-256]!'
> > aarch64ops.s:435: Warning: unpredictable transfer with writeback -- `ldp
> w4,w23,[x4],#-112'
> > aarch64ops.s:221: Warning: unpredictable transfer with writeback -- `str
> x6,[x6,11]!'
> > aarch64ops.s:223: Warning: unpredictable transfer with writeback -- `strb
> w0,[x0,-8]!'
> >
> > I think we should avoid this kind of noise.  This could be fixed by the
> following fix:
> 
> Looks good. If I were editing the Python script I'd also add
> random.seed(0) so that the generated code doesn't change every time.

Thanks for the quick reply.  Do you mean we need any more change?
For the purpose for testing the instructions, it might not be a good idea to add random.seed(0).
This will limit the randomness of the register numbers used for each run.

Best regards,
Felix