RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v3]

[Feilong Jiang]

> This patch adds Zero support for the 32-bit RISC-V architecture.
> 
> Additional tests:
> 
> - [x] Linux zero RISCV32 cross-compilation
> - [x] Resulting binaries run on QEMU User mode without problems

Feilong Jiang has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains three additional commits since the last revision:

 - Merge branch 'master' of https://github.com/openjdk/jdk into rv32-zero
 - adjust SYS_futex define for RISCV32
 - Add support for 32-bit risc-v zero

-------------

Changes:
  - all: https://git.openjdk.java.net/jdk/pull/8284/files
  - new: https://git.openjdk.java.net/jdk/pull/8284/files/dae310f9..2b6158f8

Webrevs:
 - full: https://webrevs.openjdk.java.net/?repo=jdk&pr=8284&range=02
 - incr: https://webrevs.openjdk.java.net/?repo=jdk&pr=8284&range=01-02

  Stats: 7355 lines in 832 files changed: 3683 ins; 1056 del; 2616 mod
  Patch: https://git.openjdk.java.net/jdk/pull/8284.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/8284/head:pull/8284

PR: https://git.openjdk.java.net/jdk/pull/8284