--- a/hotspot/src/share/vm/gc/shared/memset_with_concurrent_readers.hpp	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/gc/shared/memset_with_concurrent_readers.hpp	2017-06-07 14:50:39.835143370 +0300
@@ -37,7 +37,7 @@
 // understanding that there may be concurrent readers of that memory.
 void memset_with_concurrent_readers(void* to, int value, size_t size);
 
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
 
 // SPARC requires special handling.  See SPARC-specific definition.
 
--- a/hotspot/src/share/vm/compiler/oopMap.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/compiler/oopMap.cpp	2017-06-07 15:21:34.723210971 +0300
@@ -39,7 +39,7 @@
 #ifdef COMPILER2
 #include "opto/optoreg.hpp"
 #endif
-#ifdef SPARC
+#if defined (SPARC) && !defined(ZERO)
 #include "vmreg_sparc.inline.hpp"
 #endif
 
--- a/hotspot/src/os_cpu/linux_zero/vm/os_linux_zero.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/os_cpu/linux_zero/vm/os_linux_zero.cpp	2017-06-07 15:41:01.847585726 +0300
@@ -86,7 +86,7 @@
   // Must never look like an address returned by reserve_memory,
   // even in its subfields (as defined by the CPU immediate fields,
   // if the CPU splits constants across multiple instructions).
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
   // On SPARC, 0 != %hi(any real address), because there is no
   // allocation in the first 1Kb of the virtual address space.
   return (char *) 0;
--- a/hotspot/src/share/vm/opto/output.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/opto/output.cpp	2017-06-07 15:42:35.147461407 +0300
@@ -588,7 +588,7 @@
       array->append(new_loc_value( _regalloc, regnum, Location::lng ));
     }
 #else //_LP64
-#ifdef SPARC
+#if defined (SPARC) && !defined(ZERO)
     if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
       // For SPARC we have to swap high and low words for
       // long values stored in a single-register (g0-g7).
--- a/hotspot/src/share/vm/opto/chaitin.cpp~	2017-06-07 15:43:34.357918591 +0300
+++ b/hotspot/src/share/vm/opto/chaitin.cpp	2017-06-07 15:45:09.097846755 +0300
@@ -878,7 +878,7 @@
         case Op_RegD:
           lrg.set_num_regs(2);
           // Define platform specific register pressure
-#if defined(SPARC) || defined(ARM32)
+#if (defined(SPARC) && !defined(ZERO)) || defined(ARM32)
           lrg.set_reg_pressure(2);
 #elif defined(IA32)
           if( ireg == Op_RegL ) {
@@ -905,7 +905,7 @@
         case Op_RegFlags:
         case 0:                 // not an ideal register
           lrg.set_num_regs(1);
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
           lrg.set_reg_pressure(2);
 #else
           lrg.set_reg_pressure(1);
@@ -1526,7 +1526,7 @@
 
     // Check if a color is available and if so pick the color
     OptoReg::Name reg = choose_color( *lrg, chunk );
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
     debug_only(lrg->compute_set_mask_size());
     assert(lrg->num_regs() < 2 || lrg->is_bound() || is_even(reg-1), "allocate all doubles aligned");
 #endif
--- a/hotspot/src/share/vm/runtime/deoptimization.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/runtime/deoptimization.cpp	2017-06-07 15:47:36.275942531 +0300
@@ -861,7 +861,7 @@
 #ifdef _LP64
       jlong res = (jlong)low->get_int();
 #else
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
       // For SPARC we have to swap high and low words.
       jlong res = jlong_from((jint)low->get_int(), (jint)value->get_int());
 #else
@@ -895,7 +895,7 @@
   #ifdef _LP64
         jlong res = (jlong)low->get_int();
   #else
-  #ifdef SPARC
+  #if defined(SPARC) && !defined(ZERO)
         // For SPARC we have to swap high and low words.
         jlong res = jlong_from((jint)low->get_int(), (jint)value->get_int());
   #else
--- a/hotspot/src/share/vm/runtime/advancedThresholdPolicy.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/runtime/advancedThresholdPolicy.cpp	2017-06-07 15:48:36.130419657 +0300
@@ -87,7 +87,7 @@
   }
 #endif
 
-#if defined SPARC || defined AARCH64
+#if (defined(SPARC) && !defined(ZERO)) || defined AARCH64
   if (FLAG_IS_DEFAULT(InlineSmallCode)) {
     FLAG_SET_DEFAULT(InlineSmallCode, 2500);
   }
--- a/hotspot/src/share/vm/runtime/stackValue.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/runtime/stackValue.cpp	2017-06-07 15:49:31.052691809 +0300
@@ -34,7 +34,7 @@
     // Stack or register value
     Location loc = ((LocationValue *)sv)->location();
 
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
     // %%%%% Callee-save floats will NOT be working on a Sparc until we
     // handle the case of a 2 floats in a single double register.
     assert( !(loc.is_register() && loc.type() == Location::float_in_dbl), "Sparc does not handle callee-save floats yet" );
--- a/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/c1/c1_LIRAssembler.cpp	2017-06-07 15:52:20.987717957 +0300
@@ -571,7 +571,7 @@
       monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
       break;
 
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
     case lir_pack64:
       pack64(op->in_opr(), op->result_opr());
       break;
@@ -841,7 +841,7 @@
         if (!r->is_stack()) {
           stringStream st;
           st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
           _masm->_verify_oop(r->as_Register(), os::strdup(st.as_string(), mtCompiler), __FILE__, __LINE__);
 #else
           _masm->verify_oop(r->as_Register());
--- a/hotspot/src/share/vm/c1/c1_LinearScan.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/c1/c1_LinearScan.cpp	2017-06-07 15:53:34.154741548 +0300
@@ -2163,7 +2163,7 @@
         }
 #endif
 
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
         assert(assigned_reg >= pd_first_fpu_reg && assigned_reg <= pd_last_fpu_reg, "no fpu register");
         assert(interval->assigned_regHi() >= pd_first_fpu_reg && interval->assigned_regHi() <= pd_last_fpu_reg, "no fpu register");
         assert(assigned_reg % 2 == 0 && assigned_reg + 1 == interval->assigned_regHi(), "must be sequential and even");
@@ -2761,7 +2761,7 @@
 
       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi(), "assumed in calculation (only fpu_regnrLo is used)");
 #endif
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
       assert(opr->fpu_regnrLo() == opr->fpu_regnrHi() + 1, "assumed in calculation (only fpu_regnrHi is used)");
 #endif
 #ifdef ARM32
--- a/hotspot/src/share/vm/c1/c1_GraphBuilder.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/c1/c1_GraphBuilder.cpp	2017-06-07 15:54:50.281886668 +0300
@@ -2053,7 +2053,7 @@
   Value recv = has_receiver ? apop() : NULL;
   int vtable_index = Method::invalid_vtable_index;
 
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
   // Currently only supported on Sparc.
   // The UseInlineCaches only controls dispatch to invokevirtuals for
   // loaded classes which we weren't able to statically bind.
--- a/hotspot/src/share/vm/interpreter/bytecodeInterpreter.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/interpreter/bytecodeInterpreter.cpp	2017-06-07 15:55:57.572666060 +0300
@@ -3426,7 +3426,7 @@
   tty->print_cr("stack_base: " INTPTR_FORMAT, (uintptr_t) this->_stack_base);
   tty->print_cr("stack_limit: " INTPTR_FORMAT, (uintptr_t) this->_stack_limit);
   tty->print_cr("monitor_base: " INTPTR_FORMAT, (uintptr_t) this->_monitor_base);
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
   tty->print_cr("last_Java_pc: " INTPTR_FORMAT, (uintptr_t) this->_last_Java_pc);
   tty->print_cr("frame_bottom: " INTPTR_FORMAT, (uintptr_t) this->_frame_bottom);
   tty->print_cr("&native_fresult: " INTPTR_FORMAT, (uintptr_t) &this->_native_fresult);
--- a/hotspot/src/share/vm/utilities/macros.hpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/utilities/macros.hpp	2017-06-07 15:56:45.326638242 +0300
@@ -412,7 +412,7 @@
 #define NOT_S390(code) code
 #endif
 
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
 #define SPARC_ONLY(code) code
 #define NOT_SPARC(code)
 #else
--- a/hotspot/src/share/vm/utilities/globalDefinitions_gcc.hpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/utilities/globalDefinitions_gcc.hpp	2017-06-07 15:57:33.732637088 +0300
@@ -206,7 +206,7 @@
 
 // checking for nanness
 #ifdef SOLARIS
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
 inline int g_isnan(float  f) { return isnanf(f); }
 #else
 // isnanf() broken on Intel Solaris use isnand()
--- a/hotspot/src/share/vm/utilities/globalDefinitions_sparcWorks.hpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/utilities/globalDefinitions_sparcWorks.hpp	2017-06-07 15:58:30.734990739 +0300
@@ -220,7 +220,7 @@
 
 // checking for nanness
 #ifdef SOLARIS
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
 inline int g_isnan(float  f) { return isnanf(f); }
 #else
 // isnanf() broken on Intel Solaris use isnand()
--- a/hotspot/src/share/vm/adlc/output_h.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/adlc/output_h.cpp	2017-06-07 15:59:20.705053657 +0300
@@ -742,7 +742,7 @@
   fprintf(fp_hpp, "class Pipeline_Use_Cycle_Mask {\n");
 
   if (_pipeline->_maxcycleused <=
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
     64
 #else
     32
--- a/hotspot/src/share/vm/adlc/formssel.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/adlc/formssel.cpp	2017-06-07 16:00:23.795658018 +0300
@@ -1054,7 +1054,7 @@
     const char  *opType   = NULL;
     while (_matrule->base_operand(position, globals, result, name, opType)) {
       if ( strcmp(opType,"ConP") == 0 ) {
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
         reloc_entries += 2; // 1 for sethi + 1 for setlo
 #else
         ++reloc_entries;
@@ -1092,7 +1092,7 @@
   // Check for any component being an immediate float or double.
   Form::DataType data_type = is_chain_of_constant(globals);
   if( data_type==idealD || data_type==idealF ) {
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
     // sparc required more relocation entries for floating constants
     // (expires 9/98)
     reloc_entries += 6;
--- a/hotspot/src/share/vm/adlc/output_c.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/adlc/output_c.cpp	2017-06-07 16:01:26.386241521 +0300
@@ -724,7 +724,7 @@
     /* Do Nothing */;
 
   else if (_pipeline->_maxcycleused <=
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
     64
 #else
     32
--- a/hotspot/src/share/vm/c1/c1_Runtime1.cpp~	2017-05-11 15:11:42.000000000 +0300
+++ b/hotspot/src/share/vm/c1/c1_Runtime1.cpp	2017-06-07 16:07:11.220458274 +0300
@@ -1196,7 +1196,7 @@
             RelocIterator iter(nm, (address)instr_pc, (address)(instr_pc + 1));
             relocInfo::change_reloc_info_for_address(&iter, (address) instr_pc,
                                                      relocInfo::none, rtype);
-#ifdef SPARC
+#if defined(SPARC) && !defined(ZERO)
             // Sparc takes two relocations for an metadata so update the second one.
             address instr_pc2 = instr_pc + NativeMovConstReg::add_offset;
             RelocIterator iter2(nm, instr_pc2, instr_pc2 + 1);