RFR: 8366444: Add support for add/mul reduction operations for Float16 [v4]

[Bhavana Kilambi]

On Fri, 19 Dec 2025 08:47:47 GMT, Xiaohong Gong <xgong at openjdk.org> wrote:

>> Bhavana Kilambi has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Address review comments
>
> src/hotspot/cpu/aarch64/aarch64_vector.ad line 3457:
> 
>> 3455:   format %{ "reduce_addD_sve $dst_src1, $dst_src1, $src2" %}
>> 3456:   ins_encode %{
>> 3457:     assert(UseSVE > 0, "must be sve");
> 
> Why do you remove this assertion?

It was by mistake and it went past my notice. Thanks. I reverted this change.

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PR Review Comment: https://git.openjdk.org/jdk/pull/27526#discussion_r2640448217