changeset in /hg/icedtea6: 2008-05-15 Matthias Klose <doko at ubu...
doko at ubuntu.com
doko at ubuntu.com
Thu May 15 02:51:42 PDT 2008
changeset 33a90721ac50 in /hg/icedtea6
details: http://icedtea.classpath.org/hg/icedtea6?cmd=changeset;node=33a90721ac50
description:
2008-05-15 Matthias Klose <doko at ubuntu.com>
* patches/icedtea-sparc.patch: New.
* Makefile.am: Add the icedtea-sparc patch.
* acinclude.m4: Don't default to the zero port on sparc.
* Makefile.in, configure: Regenerated.
diffstat:
6 files changed, 1830 insertions(+), 2 deletions(-)
ChangeLog | 7
Makefile.am | 1
Makefile.in | 4
acinclude.m4 | 1
configure | 1
patches/icedtea-sparc.patch | 1818 +++++++++++++++++++++++++++++++++++++++++++
diffs (truncated from 1883 to 500 lines):
diff -r 493b2cd196e2 -r 33a90721ac50 ChangeLog
--- a/ChangeLog Wed May 14 14:13:02 2008 -0400
+++ b/ChangeLog Thu May 15 11:51:53 2008 +0200
@@ -1,3 +1,10 @@ 2008-05-14 Joshua Sumali <jsumali at redh
+2008-05-15 Matthias Klose <doko at ubuntu.com>
+
+ * patches/icedtea-sparc.patch: New.
+ * Makefile.am: Add the icedtea-sparc patch.
+ * acinclude.m4: Don't default to the zero port on sparc.
+ * Makefile.in, configure: Regenerated.
+
2008-05-14 Joshua Sumali <jsumali at redhat.com>
* rt/net/sourceforge/jnlp/security/CertsInfoPane.java: Fix certificate
diff -r 493b2cd196e2 -r 33a90721ac50 Makefile.am
--- a/Makefile.am Wed May 14 14:13:02 2008 -0400
+++ b/Makefile.am Thu May 15 11:51:53 2008 +0200
@@ -313,6 +313,7 @@ ICEDTEA_PATCHES = \
patches/icedtea-gervill.patch \
patches/icedtea-directaudio-close-trick.patch \
patches/icedtea-hat-spl-gpl.patch \
+ patches/icedtea-sparc.patch \
$(GCC_PATCH) \
$(DISTRIBUTION_PATCHES)
diff -r 493b2cd196e2 -r 33a90721ac50 Makefile.in
--- a/Makefile.in Wed May 14 14:13:02 2008 -0400
+++ b/Makefile.in Thu May 15 11:51:53 2008 +0200
@@ -415,8 +415,8 @@ ICEDTEA_PATCHES = $(ZERO_PATCHES_COND) \
patches/icedtea-color-profiles.patch \
patches/icedtea-fonts.patch patches/icedtea-gervill.patch \
patches/icedtea-directaudio-close-trick.patch \
- patches/icedtea-hat-spl-gpl.patch $(GCC_PATCH) \
- $(DISTRIBUTION_PATCHES) $(am__append_7)
+ patches/icedtea-hat-spl-gpl.patch patches/icedtea-sparc.patch \
+ $(GCC_PATCH) $(DISTRIBUTION_PATCHES) $(am__append_7)
# Patch OpenJDK for plug replacements and ecj.
ICEDTEA_ECJ_PATCH = patches/icedtea-ecj.patch
diff -r 493b2cd196e2 -r 33a90721ac50 acinclude.m4
--- a/acinclude.m4 Wed May 14 14:13:02 2008 -0400
+++ b/acinclude.m4 Thu May 15 11:51:53 2008 +0200
@@ -542,6 +542,7 @@ AC_DEFUN([ENABLE_ZERO_BUILD],
[
case "${host}" in
i?86-*-*) ;;
+ sparc*-*-*) ;;
x86_64-*-*) ;;
*)
if test "x${CACAO}" != xno; then
diff -r 493b2cd196e2 -r 33a90721ac50 configure
--- a/configure Wed May 14 14:13:02 2008 -0400
+++ b/configure Thu May 15 11:51:53 2008 +0200
@@ -8659,6 +8659,7 @@ else
case "${host}" in
i?86-*-*) ;;
+ sparc*-*-*) ;;
x86_64-*-*) ;;
*)
if test "x${CACAO}" != xno; then
diff -r 493b2cd196e2 -r 33a90721ac50 patches/icedtea-sparc.patch
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/patches/icedtea-sparc.patch Thu May 15 11:51:53 2008 +0200
@@ -0,0 +1,1818 @@
+
+# HG changeset patch
+# User phh
+# Date 1209064077 14400
+# Node ID 435e6450501506326c95d3374eb08b3406fa420c
+# Parent ec73d88d5b43153e083db1fc57971def1e828ab3
+6693457: Open-source hotspot linux-sparc support
+Summary: Move os_cpu/linux_sparc from closed to open
+Reviewed-by: kamg
+
+#--- a/src/share/vm/oops/oop.inline.hpp Wed Apr 23 06:35:28 2008 -0400
+#+++ openjdk/hotspot/src/share/vm/oops/oop.inline.hpp Thu Apr 24 15:07:57 2008 -0400
+#@@ -135,7 +135,7 @@ inline narrowOop oopDesc::encode_heap_oo
+# assert(!is_null(v), "oop value can never be zero");
+# address heap_base = Universe::heap_base();
+# uint64_t result = (uint64_t)(pointer_delta((void*)v, (void*)heap_base, 1) >> LogMinObjAlignmentInBytes);
+#- assert((result & 0xffffffff00000000L) == 0, "narrow oop overflow");
+#+ assert((result & 0xffffffff00000000ULL) == 0, "narrow oop overflow");
+# return (narrowOop)result;
+# }
+#
+--- /dev/null Thu Jan 01 00:00:00 1970 +0000
++++ openjdk/hotspot/make/linux/platform_sparcv9 Thu Apr 24 15:07:57 2008 -0400
+@@ -0,0 +1,15 @@
++os_family = linux
++
++arch = sparc
++
++arch_model = sparc
++
++os_arch = linux_sparc
++
++os_arch_model = linux_sparc
++
++lib_arch = sparcv9
++
++compiler = gcc
++
++sysdefs = -DLINUX -D_GNU_SOURCE -DSPARC
+--- /dev/null Thu Jan 01 00:00:00 1970 +0000
++++ openjdk/hotspot/src/os_cpu/linux_sparc/vm/assembler_linux_sparc.cpp Thu Apr 24 15:07:57 2008 -0400
+@@ -0,0 +1,51 @@
++/*
++ * Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved.
++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
++ *
++ * This code is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 only, as
++ * published by the Free Software Foundation.
++ *
++ * This code is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * version 2 for more details (a copy is included in the LICENSE file that
++ * accompanied this code).
++ *
++ * You should have received a copy of the GNU General Public License version
++ * 2 along with this work; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
++ * CA 95054 USA or visit www.sun.com if you need additional information or
++ * have any questions.
++ *
++ */
++
++#include "incls/_precompiled.incl"
++#include "incls/_assembler_linux_sparc.cpp.incl"
++
++#include <asm-sparc/traps.h>
++
++bool MacroAssembler::needs_explicit_null_check(intptr_t offset) {
++ // Since the linux kernel resides at the low end of
++ // user address space, no null pointer check is needed.
++ return offset < 0 || offset >= 0x100000;
++}
++
++void MacroAssembler::read_ccr_trap(Register ccr_save) {
++ // No implementation
++ breakpoint_trap();
++}
++
++void MacroAssembler::write_ccr_trap(Register ccr_save, Register scratch1, Register scratch2) {
++ // No implementation
++ breakpoint_trap();
++}
++
++void MacroAssembler::flush_windows_trap() { trap(SP_TRAP_FWIN); }
++void MacroAssembler::clean_windows_trap() { trap(SP_TRAP_CWIN); }
++
++// Use software breakpoint trap until we figure out how to do this on Linux
++void MacroAssembler::get_psr_trap() { trap(SP_TRAP_SBPT); }
++void MacroAssembler::set_psr_trap() { trap(SP_TRAP_SBPT); }
+--- /dev/null Thu Jan 01 00:00:00 1970 +0000
++++ openjdk/hotspot/src/os_cpu/linux_sparc/vm/atomic_linux_sparc.inline.hpp Thu Apr 24 15:07:57 2008 -0400
+@@ -0,0 +1,206 @@
++/*
++ * Copyright 1999-2007 Sun Microsystems, Inc. All Rights Reserved.
++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
++ *
++ * This code is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 only, as
++ * published by the Free Software Foundation.
++ *
++ * This code is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * version 2 for more details (a copy is included in the LICENSE file that
++ * accompanied this code).
++ *
++ * You should have received a copy of the GNU General Public License version
++ * 2 along with this work; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
++ * CA 95054 USA or visit www.sun.com if you need additional information or
++ * have any questions.
++ *
++ */
++
++// Implementation of class atomic
++
++inline void Atomic::store (jbyte store_value, jbyte* dest) { *dest = store_value; }
++inline void Atomic::store (jshort store_value, jshort* dest) { *dest = store_value; }
++inline void Atomic::store (jint store_value, jint* dest) { *dest = store_value; }
++inline void Atomic::store (jlong store_value, jlong* dest) { *dest = store_value; }
++inline void Atomic::store_ptr(intptr_t store_value, intptr_t* dest) { *dest = store_value; }
++inline void Atomic::store_ptr(void* store_value, void* dest) { *(void**)dest = store_value; }
++
++inline void Atomic::store (jbyte store_value, volatile jbyte* dest) { *dest = store_value; }
++inline void Atomic::store (jshort store_value, volatile jshort* dest) { *dest = store_value; }
++inline void Atomic::store (jint store_value, volatile jint* dest) { *dest = store_value; }
++inline void Atomic::store (jlong store_value, volatile jlong* dest) { *dest = store_value; }
++inline void Atomic::store_ptr(intptr_t store_value, volatile intptr_t* dest) { *dest = store_value; }
++inline void Atomic::store_ptr(void* store_value, volatile void* dest) { *(void* volatile *)dest = store_value; }
++
++inline void Atomic::inc (volatile jint* dest) { (void)add (1, dest); }
++inline void Atomic::inc_ptr(volatile intptr_t* dest) { (void)add_ptr(1, dest); }
++inline void Atomic::inc_ptr(volatile void* dest) { (void)add_ptr(1, dest); }
++
++inline void Atomic::dec (volatile jint* dest) { (void)add (-1, dest); }
++inline void Atomic::dec_ptr(volatile intptr_t* dest) { (void)add_ptr(-1, dest); }
++inline void Atomic::dec_ptr(volatile void* dest) { (void)add_ptr(-1, dest); }
++
++inline jint Atomic::add (jint add_value, volatile jint* dest) {
++ intptr_t rv;
++ __asm__ volatile(
++ "1: \n\t"
++ " ld [%2], %%o2\n\t"
++ " add %1, %%o2, %%o3\n\t"
++ " cas [%2], %%o2, %%o3\n\t"
++ " cmp %%o2, %%o3\n\t"
++ " bne 1b\n\t"
++ " nop\n\t"
++ " add %1, %%o2, %0\n\t"
++ : "=r" (rv)
++ : "r" (add_value), "r" (dest)
++ : "memory", "o2", "o3");
++ return rv;
++}
++
++inline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) {
++ intptr_t rv;
++#ifdef _LP64
++ __asm__ volatile(
++ "1: \n\t"
++ " ldx [%2], %%o2\n\t"
++ " add %0, %%o2, %%o3\n\t"
++ " casx [%2], %%o2, %%o3\n\t"
++ " cmp %%o2, %%o3\n\t"
++ " bne %%xcc, 1b\n\t"
++ " nop\n\t"
++ " add %0, %%o2, %0\n\t"
++ : "=r" (rv)
++ : "r" (add_value), "r" (dest)
++ : "memory", "o2", "o3");
++#else
++ __asm__ volatile(
++ "1: \n\t"
++ " ld [%2], %%o2\n\t"
++ " add %1, %%o2, %%o3\n\t"
++ " cas [%2], %%o2, %%o3\n\t"
++ " cmp %%o2, %%o3\n\t"
++ " bne 1b\n\t"
++ " nop\n\t"
++ " add %1, %%o2, %0\n\t"
++ : "=r" (rv)
++ : "r" (add_value), "r" (dest)
++ : "memory", "o2", "o3");
++#endif // _LP64
++ return rv;
++}
++
++inline void* Atomic::add_ptr(intptr_t add_value, volatile void* dest) {
++ return (void*)add_ptr((intptr_t)add_value, (volatile intptr_t*)dest);
++}
++
++
++inline jint Atomic::xchg (jint exchange_value, volatile jint* dest) {
++ intptr_t rv = exchange_value;
++ __asm__ volatile(
++ " swap [%2],%1\n\t"
++ : "=r" (rv)
++ : "0" (exchange_value) /* we use same register as for return value */, "r" (dest)
++ : "memory");
++ return rv;
++}
++
++inline intptr_t Atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest) {
++ intptr_t rv = exchange_value;
++#ifdef _LP64
++ __asm__ volatile(
++ "1:\n\t"
++ " mov %1, %%o3\n\t"
++ " ldx [%2], %%o2\n\t"
++ " casx [%2], %%o2, %%o3\n\t"
++ " cmp %%o2, %%o3\n\t"
++ " bne %%xcc, 1b\n\t"
++ " nop\n\t"
++ " mov %%o2, %0\n\t"
++ : "=r" (rv)
++ : "r" (exchange_value), "r" (dest)
++ : "memory", "o2", "o3");
++#else
++ __asm__ volatile(
++ "swap [%2],%1\n\t"
++ : "=r" (rv)
++ : "0" (exchange_value) /* we use same register as for return value */, "r" (dest)
++ : "memory");
++#endif // _LP64
++ return rv;
++}
++
++inline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) {
++ return (void*)xchg_ptr((intptr_t)exchange_value, (volatile intptr_t*)dest);
++}
++
++
++inline jint Atomic::cmpxchg (jint exchange_value, volatile jint* dest, jint compare_value) {
++ jint rv;
++ __asm__ volatile(
++ " cas [%2], %3, %0"
++ : "=r" (rv)
++ : "0" (exchange_value), "r" (dest), "r" (compare_value)
++ : "memory");
++ return rv;
++}
++
++inline jlong Atomic::cmpxchg (jlong exchange_value, volatile jlong* dest, jlong compare_value) {
++#ifdef _LP64
++ jlong rv;
++ __asm__ volatile(
++ " casx [%2], %3, %0"
++ : "=r" (rv)
++ : "0" (exchange_value), "r" (dest), "r" (compare_value)
++ : "memory");
++ return rv;
++#else
++ assert(VM_Version::v9_instructions_work(), "cas only supported on v9");
++ volatile jlong_accessor evl, cvl, rv;
++ evl.long_value = exchange_value;
++ cvl.long_value = compare_value;
++
++ __asm__ volatile(
++ " sllx %2, 32, %2\n\t"
++ " srl %3, 0, %3\n\t"
++ " or %2, %3, %2\n\t"
++ " sllx %5, 32, %5\n\t"
++ " srl %6, 0, %6\n\t"
++ " or %5, %6, %5\n\t"
++ " casx [%4], %5, %2\n\t"
++ " srl %2, 0, %1\n\t"
++ " srlx %2, 32, %0\n\t"
++ : "=r" (rv.words[0]), "=r" (rv.words[1])
++ : "r" (evl.words[0]), "r" (evl.words[1]), "r" (dest), "r" (cvl.words[0]), "r" (cvl.words[1])
++ : "memory");
++
++ return rv.long_value;
++#endif
++}
++
++inline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, volatile intptr_t* dest, intptr_t compare_value) {
++ intptr_t rv;
++#ifdef _LP64
++ __asm__ volatile(
++ " casx [%2], %3, %0"
++ : "=r" (rv)
++ : "0" (exchange_value), "r" (dest), "r" (compare_value)
++ : "memory");
++#else
++ __asm__ volatile(
++ " cas [%2], %3, %0"
++ : "=r" (rv)
++ : "0" (exchange_value), "r" (dest), "r" (compare_value)
++ : "memory");
++#endif // _LP64
++ return rv;
++}
++
++inline void* Atomic::cmpxchg_ptr(void* exchange_value, volatile void* dest, void* compare_value) {
++ return (void*)cmpxchg_ptr((intptr_t)exchange_value, (volatile intptr_t*)dest, (intptr_t)compare_value);
++}
+--- /dev/null Thu Jan 01 00:00:00 1970 +0000
++++ openjdk/hotspot/src/os_cpu/linux_sparc/vm/globals_linux_sparc.hpp Thu Apr 24 15:07:57 2008 -0400
+@@ -0,0 +1,34 @@
++/*
++ * Copyright 2000-2004 Sun Microsystems, Inc. All Rights Reserved.
++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
++ *
++ * This code is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 only, as
++ * published by the Free Software Foundation.
++ *
++ * This code is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * version 2 for more details (a copy is included in the LICENSE file that
++ * accompanied this code).
++ *
++ * You should have received a copy of the GNU General Public License version
++ * 2 along with this work; if not, write to the Free Software Foundation,
++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
++ * CA 95054 USA or visit www.sun.com if you need additional information or
++ * have any questions.
++ *
++ */
++
++//
++// Sets the default values for platform dependent flags used by the
++// runtime system. (see globals.hpp)
++//
++
++define_pd_global(uintx, JVMInvokeMethodSlack, 12288);
++define_pd_global(intx, CompilerThreadStackSize, 0);
++
++// Only used on 64 bit Windows platforms
++define_pd_global(bool, UseVectoredExceptions, false);
+--- /dev/null Thu Jan 01 00:00:00 1970 +0000
++++ openjdk/hotspot/src/os_cpu/linux_sparc/vm/linux_sparc.ad Thu Apr 24 15:07:57 2008 -0400
+@@ -0,0 +1,27 @@
++//
++// Copyright 1999-2007 Sun Microsystems, Inc. All Rights Reserved.
++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
++//
++// This code is free software; you can redistribute it and/or modify it
++// under the terms of the GNU General Public License version 2 only, as
++// published by the Free Software Foundation.
++//
++// This code is distributed in the hope that it will be useful, but WITHOUT
++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++// version 2 for more details (a copy is included in the LICENSE file that
++// accompanied this code).
++//
++// You should have received a copy of the GNU General Public License version
++// 2 along with this work; if not, write to the Free Software Foundation,
++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++//
++// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
++// CA 95054 USA or visit www.sun.com if you need additional information or
++// have any questions.
++//
++
++//
++//
++
++// SPARC Linux Architecture Description File
+--- /dev/null Thu Jan 01 00:00:00 1970 +0000
++++ openjdk/hotspot/src/os_cpu/linux_sparc/vm/linux_sparc.s Thu Apr 24 15:07:57 2008 -0400
+@@ -0,0 +1,105 @@
++#
++# Copyright 2005-2007 Sun Microsystems, Inc. All Rights Reserved.
++# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
++#
++# This code is free software; you can redistribute it and/or modify it
++# under the terms of the GNU General Public License version 2 only, as
++# published by the Free Software Foundation.
++#
++# This code is distributed in the hope that it will be useful, but WITHOUT
++# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++# version 2 for more details (a copy is included in the LICENSE file that
++# accompanied this code).
++#
++# You should have received a copy of the GNU General Public License version
++# 2 along with this work; if not, write to the Free Software Foundation,
++# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++#
++# Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
++# CA 95054 USA or visit www.sun.com if you need additional information or
++# have any questions.
++#
++
++ # Prototype: int SafeFetch32 (int * adr, int ErrValue)
++ # The "ld" at Fetch32 is potentially faulting instruction.
++ # If the instruction traps the trap handler will arrange
++ # for control to resume at Fetch32Resume.
++ # By convention with the trap handler we ensure there is a non-CTI
++ # instruction in the trap shadow.
++
++
++ .globl SafeFetch32, Fetch32PFI, Fetch32Resume
++ .globl SafeFetchN
++ .align 32
++ .type SafeFetch32, at function
++SafeFetch32:
++ mov %o0, %g1
++ mov %o1, %o0
++Fetch32PFI:
++ # <-- Potentially faulting instruction
++ ld [%g1], %o0
++Fetch32Resume:
++ nop
++ retl
++ nop
++
++ .globl SafeFetchN, FetchNPFI, FetchNResume
++ .type SafeFetchN, at function
++ .align 32
++SafeFetchN:
++ mov %o0, %g1
++ mov %o1, %o0
++FetchNPFI:
++ ldn [%g1], %o0
++FetchNResume:
++ nop
++ retl
++ nop
++
++ # Possibilities:
++ # -- membar
++ # -- CAS (SP + BIAS, G0, G0)
++ # -- wr %g0, %asi
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