Add atomic sequences using ldrexd/strexd

[Andrew Haley]

Stefan Ring pointed out that we really need special atomic sequences
for volatile longs.  Implemented thusly, for ARMv7.  ldrexd/strexd are
supposed to be supported on ARMv6K as well, but I don't really know
what an ARMv6K is, and I certainly haven't got one.

We really should have atomic sequences for older ARMs as well; there
is a fairly nice way to do it, but I'm not sure if I'll get time to
implement it.

I'll do JIT-compiled volatile longs tomorrow if I get time.

Andrew.

2011-12-19  Andrew Haley  <aph at redhat.com>

	* arm_port/hotspot/src/cpu/zero/vm/bytecodes_arm.def
	(lgetfield, lputfield): Add atomic sequences using ldrexd/strexd.
	* openjdk-ecj/hotspot/src/cpu/zero/vm/cppInterpreter_arm.S
	(getstatic_volatile_dw, putstatic_volatile_dw): Likewise.

diff -r 0c874e429552 -r fd44d23e1368 arm_port/hotspot/src/cpu/zero/vm/bytecodes_arm.def
--- a/arm_port/hotspot/src/cpu/zero/vm/bytecodes_arm.def	Mon Dec 19 16:04:36 2011 +0000
+++ b/arm_port/hotspot/src/cpu/zero/vm/bytecodes_arm.def	Mon Dec 19 13:05:45 2011 -0500
@@ -1710,11 +1710,19 @@
 3:
 	VOLATILE_VERSION
 	ldr	tmp2, [tmp2, #CP_OFFSET+8]
-	DISPATCH_NEXT
 	add	tmp2, tmp1, tmp2
-	DISPATCH_NEXT
+#ifndef	__ARM_ARCH_7A__
 .abortentry82_v:
 	ldmia	tmp2, {tmp2, tmp1}
+#else
+	mov	ip, tmp2
+.abortentry82_v:
+	ldrexd	tmp2, tmp1 , [ip]
+	strexd	r2 , tmp2, tmp1, [ip]
+	teq	r2, #0
+	bne	.abortentry82_v
+#endif
+	DISPATCH_NEXT
 	FullBarrier
 	DISPATCH_NEXT
 	PUSH	tmp2, tmp1
@@ -1858,13 +1866,23 @@
 3:
 	VOLATILE_VERSION
 	ldr	tmp2, [tmp2, #CP_OFFSET+8]
-	DISPATCH_NEXT
 	add	tmp2, lr, tmp2
-	DISPATCH_NEXT
-	DISPATCH_NEXT
 	StoreStoreBarrier
+#ifndef	__ARM_ARCH_7A__
 .abortentry86_v:
 	stm	tmp2, {r3, tmp1}
+#else
+	mov	ip, tmp2
+	mov	tmp2, r3
+	// Data in tmp1 & tmp2, address in ip, r2 & r3 scratch
+.abortentry86_v:
+	ldrexd	r2, r3, [ip]
+	strexd	r2, tmp2, tmp1, [ip]
+	teq	r2, #0
+	bne	.abortentry86_v
+#endif
+	DISPATCH_NEXT
+	DISPATCH_NEXT
 	StoreLoadBarrier
 	DISPATCH_FINISH
 }
diff -r 0c874e429552 -r fd44d23e1368 arm_port/hotspot/src/cpu/zero/vm/cppInterpreter_arm.S
--- a/arm_port/hotspot/src/cpu/zero/vm/cppInterpreter_arm.S	Mon Dec 19 16:04:36 2011 +0000
+++ b/arm_port/hotspot/src/cpu/zero/vm/cppInterpreter_arm.S	Mon Dec 19 13:05:45 2011 -0500
@@ -1318,7 +1318,7 @@
 	str	tmp1, [ip, #JNIHANDLEBLOCK_TOP]
 	str	r1, [r5, #4]
 	str	r5, [r9, #THREAD_JAVA_SP]
-	mov     r0, #0  @ deoptimized_frames = 0
+	mov	r0, #0	@ deoptimized_frames = 0
 	ldmfd	arm_sp!, {fast_regset, pc}
 .fast_native_return_byte:
 	mov	r0, r0, lsl #24
@@ -2084,10 +2084,20 @@
 getstatic_volatile_dw:
 	DISPATCH_START	3
 	add	r3, r3, lr
+#ifndef	__ARM_ARCH_7A__
 	ldm	r3, {r2, tmp2}
 	FullBarrier
 	DISPATCH_NEXT
 	PUSH	r2, tmp2
+#else
+0:	ldrexd	tmp2, tmp1 , [r3]
+	strexd	r2 , tmp2, tmp1, [r3]
+	teq	r2, #0
+	bne	0b
+	FullBarrier
+	DISPATCH_NEXT
+	PUSH	tmp2, tmp1
+#endif
 	DISPATCH_FINISH
 getstatic_volatile_w:
 	DISPATCH_START	3
@@ -2126,11 +2136,20 @@
 	DISPATCH_FINISH
 putstatic_volatile_dw:
 	DISPATCH_START	3
-	add	r2, r2, r3
-	POP	r3, tmp2
+	add	ip, r2, r3
+	POP	tmp1, tmp2
 	DISPATCH_NEXT
 	StoreStoreBarrier
-	stm	r2, {r3, tmp2}
+#ifndef	__ARM_ARCH_7A__
+	stm	ip, {tmp1, tmp2}
+#else
+	// Data in tmp1 & tmp2, address in ip, r2 & r3 scratch
+0:	ldrexd	r2, r3, [ip]
+	strexd	r2, tmp2, tmp1, [ip]
+	teq	r2, #0
+	bne	0b
+#endif
+	DISPATCH_NEXT
 	StoreLoadBarrier
 	DISPATCH_FINISH
 putstatic_volatile_a: