ARM: More intrinsics part 2/2 ok

[Xerxes Rånby]

This part 2 of 2 patch are OK for inclusion.

2012-03-15 12:44, Andrew Haley skrev:
> This is the correct patch, I think.
> 
> Andrew.
> 
> 
> diff -r f2b27b309c43 ChangeLog
> --- a/ChangeLog Wed Mar 14 05:47:19 2012 -0400
> +++ b/ChangeLog Thu Mar 15 07:42:50 2012 -0400
> @@ -1,3 +1,10 @@
> +2012-03-15  Andrew Haley  <aph at redhat.com>
> +
> +       * openjdk/hotspot/src/cpu/zero/vm/thumb2.cpp (it): Add code to
> +       handle negated conditions.
> +       (handle_special_method): Use blx_reg rather than blx in case the
> +       target is thumb code.
> +
>  2012-03-14  Andrew Haley  <aph at redhat.com>
> 
>         * arm_port/hotspot/src/cpu/zero/vm/bytecodes_arm.def (ldc, ldc_w):
> diff -r f2b27b309c43 arm_port/hotspot/src/cpu/zero/vm/thumb2.cpp
> --- a/arm_port/hotspot/src/cpu/zero/vm/thumb2.cpp       Wed Mar 14 05:47:19
> 2012 -0400
> +++ b/arm_port/hotspot/src/cpu/zero/vm/thumb2.cpp       Thu Mar 15 07:42:50
> 2012 -0400
> @@ -3042,10 +3042,7 @@
>  #define T_IT(cond, mask) (0xbf00 | (conds[cond] << 4) | (mask))
> 
>  #define IT_MASK_T      8
> -#define IT_MASK_TE     0x14
> -#define IT_MASK_TT     0x1e
> -#define IT_MASK_TTT    0x1e
> -#define IT_MASK_TEE    0x12
> +#define IT_MASK_TEE    0x0e
> 
>  #define PATCH(loc)     do {                                            \
>           unsigned oldidx = codebuf->idx;                               \
> @@ -3071,6 +3068,28 @@
> 
>  int it(CodeBuf *codebuf, unsigned cond, unsigned mask)
>  {
> +  if (cond & 1) {
> +    // If this is a negated condition, flip all the bits above the
> +    // least significant bit that is 1.  Note that at least one bit is
> +    // always 1 in mask
> +    switch (mask & (-mask)) {
> +    case 8:
> +      break;
> +    case 4:
> +      mask ^= 8;
> +      break;
> +    case 2:
> +      mask ^= 0x0c;
> +      break;
> +    case 1:
> +      mask ^= 0x0e;
> +      break;
> +    default:
> +      // Impossible unless someone specified an incorrect mask
> +      longjmp(compiler_error_env, COMPILER_RESULT_FAILED);
> +    }
> +  }
> +
>    return out_16(codebuf, T_IT(cond, mask));
>  }

The code looks ok, Here are a reference to the ARM IT block definition:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Cjabicci.html
found under "Home > ARM and Thumb Instructions > Branch and control instructions > IT"

Thank you and Paulo for posting the example code
Paulo's version: http://mail.openjdk.java.net/pipermail/distro-pkg-dev/2012-March/017721.html
and
Aph's version: http://mail.openjdk.java.net/pipermail/distro-pkg-dev/2012-March/017732.html
that verify its logic.

This part are OK, please push into icedtea6 HEAD.


> 
> @@ -5077,7 +5096,8 @@
>        // FIXME: The JNI StrictMath routines don't use the JNIEnv *env
>        // parameter, so it's arguably pointless to pass it here.
>        add_imm(jinfo->codebuf, ARM_R0, Rthread, THREAD_JNI_ENVIRONMENT);
> -      blx(jinfo->codebuf, (unsigned)entry_point);
> +      mov_imm(jinfo->codebuf, ARM_IP, (unsigned)entry_point);
> +      blx_reg(jinfo->codebuf, ARM_IP);
>        bcc_patch(jinfo->codebuf, COND_EQ, loc);
>        vfp_to_jstack(jinfo, VFP_D0);

This block are already part of icedtea6 head, be careful while merging.
http://icedtea.classpath.org/hg/icedtea6/rev/b8d810f20366

Cheers
Xerxes