method prologue code generation
Thomas Wuerthinger
thomas.wuerthinger at oracle.com
Sun Apr 14 14:22:23 PDT 2013
The compiler is configured via a RegisterConfig instance. This class has a method getCallingConvention that takes the signature of the called method and the type of the call to determine the configuration.
I think some confusion might currently come from the fact that PTX uses the AMD64 register configuration. We will change that such that PTX provides its own configuration.
- thomas
On Apr 10, 2013, at 6:12 PM, "Venkatachalam, Vasanth" <Vasanth.Venkatachalam at amd.com> wrote:
> Thanks. For future reference, is there a file I can look at to understand what Graal's parameter->register mapping conventions are, atleast for x86?
> I notice that when running the same test case multiple times the same registers are chosen, but slight changes to the test case parameters result in different registers and it's not always clear what the pattern is (e.g., param1 = register encoding 0, param2 = register encoding 1, etc.). For some test cases the first param goes into a register with encoding 0 but for others it goes into a register with encoding 6.
>
> Vasanth
>
>
>
> -----Original Message-----
> From: Thomas Wuerthinger [mailto:thomas.wuerthinger at oracle.com]
> Sent: Wednesday, April 10, 2013 11:00 AM
> To: Venkatachalam, Vasanth
> Cc: graal-dev at openjdk.java.net
> Subject: Re: method prologue code generation
>
> Vasanth,
>
> On Apr 10, 2013, at 5:33 PM, "Venkatachalam, Vasanth" <Vasanth.Venkatachalam at amd.com> wrote:
>> I'm looking at PTXBackend.emitCode( ) and it looks like the code for the method prologue is being emitted before the actual code generation takes place in the call to lirGen.lir.emitCode(tasm). In particular, it looks like the registers that are later used in the code generation of the method body are being manually declared here.
>>
>> Can someone explain the intent for doing things in this order?
> I believe this is more a requirement of PTX assembly to declare the kernel parameters before the kernel body.
>
>> My concern is the following. It looks like the mapping of method parameters/variables to registers only happens in the call to lirGen.lir.emitCode( ), so before this call takes place it seems you wouldn't really know which registers will be used for different parameters/variables.
>>
>> So how would you know what registers need to be declared in the prologue section, before you generate the code for the body of the method?
> The locations used for the parameters are usually part of the calling convention. This contract between the caller and the callee is defined based on the method signature.
>
>> On the other hand, do you have a way of piping the variable->register mapping information from lirGen.lir.emitCode( ) so that you can retrieve this when you generate the prologue?
> It is not necessary to pipe the parameter->register information as it is defined based on the method signature. The variable->register mapping is done automatically by the register allocator. In PTX, you only have to specify how many registers you want to "reserve" for future use.
>
> Hope this helps,
> thomas
>
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