review (M) for 6862956: PhaseIdealLoop should have a CFG verification mode
Tom Rodriguez
Thomas.Rodriguez at Sun.COM
Wed Aug 12 15:01:11 PDT 2009
Done.
tom
On Aug 12, 2009, at 2:37 PM, Vladimir Kozlov wrote:
> So you want to do at least one dominator verification.
> Please, add the comment there.
>
> Vladimir
>
> Vladimir Kozlov wrote:
>> Why you didn't place second verify() under if(loop_opts_cnt > 0)?
>> Vladimir
>> Tom Rodriguez wrote:
>>>
>>> On Aug 12, 2009, at 1:59 PM, Vladimir Kozlov wrote:
>>>
>>>>
>>>> Tom Rodriguez wrote:
>>>>> No I haven't. It's certainly not free. I can add some
>>>>> TracePhases and do some runs. I also moved the first verify
>>>>> into the preceeding block of PhaseIdealLoop passes so we aren't
>>>>> doing doing multiple verifies for code without loops. I'll get
>>>>> some numbers.
>>>>
>>>> Thanks you.
>>>>
>>>> I looked more and found that you miss break in the error case in
>>>> verify_dominance().
>>>
>>> Right, otherwise we'll just assert in idom. Thanks.
>>>
>>> tom
>>>
>>>>
>>>> Vladimir
>>>>
>>>>> tom
>>>>> On Aug 12, 2009, at 12:53 PM, Vladimir Kozlov wrote:
>>>>>> Thank you, Tom, for doing this.
>>>>>>
>>>>>> Changes look good.
>>>>>> Did you measure how much time compiler spends in the
>>>>>> verification code
>>>>>> (in PhaseIdealLoop::verify(igvn))?
>>>>>>
>>>>>> Thanks,
>>>>>> Vladimir
>>>>>>
>>>>>> Tom Rodriguez wrote:
>>>>>>> http://cr.openjdk.java.net/~never/6862956/
>>>
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