Request for review (L): 6797305: Add LoadUB and LoadUI opcode class

[Tom Rodriguez]

>> Good question.  The correct instruction generated by unmodified  
>> HotSpot
> is:
>
> 029     movslq  R10, [RSP + #0 (32-bit)]        # i2l

That looks like a cisc spill.  The matcher and the adlc collaborate to  
identify pairs of instructions that do the same thing but where one  
takes a register and the other takes memory.  Then if the register  
allocator needs to reload a value from stack it can use the memory  
version instead of inserting a real spill.  I wonder if something is  
going wrong with the logic for identifying these.  Where's your  
generated ad_x86_64.hpp?

tom


>
>
> and the corresponding store before is:
>
> 019     movl    [rsp + #0], RSI # spill
>
> So I think src is a Param (if that's a valid node).
>
> -- Christian
>