Request for reviews (XL): 7119644: Increase superword's vector size up to 256 bits

Vladimir Kozlov vladimir.kozlov at oracle.com
Wed Apr 4 15:52:25 PDT 2012


I updated webrev.

Thanks,
Vladimir

Vladimir Kozlov wrote:
> I found few issues in superword code during testing on SB, the rest 
> changes seems fine. I will send updated webrev after I resolve issues.
> 
> Vladimir
> 
> Vladimir Kozlov wrote:
>> http://cr.openjdk.java.net/~kvn/7119644/webrev
>>
>> 7119644: Increase superword's vector size up to 256 bits
>>
>> Increase superword's vector size up to 256-bits for YMM AVX registers 
>> on x86. Added generation of different vector sizes for different types 
>> of arrays in the same loop. Allow to generate small (4 bytes) vectors 
>> for loops which were unrolled small number of iterations.
>> Add new C2 types for vectors and rework VectorNode implementation. 
>> Used MachTypeNode as base node for vector mach nodes to keep vector type.
>> Moved XMM registers definition and vector instructions into one file 
>> x86.ad (have to rename eRegI to rRegI in x86_32.ad).
>>
>> Tested with full CTW, NSK, C2 regression tests, JPRT and added new test.
>>
>> Thanks,
>> Vladimir


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