Request for reviews (M): 8004835: Improve AES intrinsics on x86

[Vladimir Kozlov]

Thank you, Christian

The MacroAssembler::pshufb() already has the same assert so I will just 
remove one from Assembler::pshufb().

Thanks,
Vladimir

On 12/19/12 2:21 PM, Christian Thalinger wrote:
>
> On Dec 15, 2012, at 2:09 PM, Vladimir Kozlov <vladimir.kozlov at oracle.com> wrote:
>
>> http://cr.openjdk.java.net/~kvn/8004835/webrev/
>>
>> Enable AES intrinsics on non-AVX cpus (Westmere), pshufb instruction in load_key() method could be used without AVX because it references only aligned memory "key_shuffle_mask".
>>
>> Group together aes instructions in encryptBlock/decryptBlock stubs as recommended by Intel Optimization Guide.
>>
>> Modified test/compiler/7184394 to test "ECB" mode.
>>
>> Ran compiler regression tests and jdk crypto and security tests with SunJCE default provider.
>
> src/cpu/x86/vm/assembler_x86.cpp:
>
> ! void Assembler::pshufb(XMMRegister dst, Address src, bool aligned_adr) {
>      assert(VM_Version::supports_ssse3(), "");
> !   assert((UseAVX > 0) || aligned_adr, "SSE mode requires address alignment 16 bytes");
>
> Can we move that assert up into the MacroAssembler?  We should try to keep the Assembler as clean as possible if we want to generate it in the future.
>
> Otherwise this looks good.
>
> -- Chris
>
>>
>> Thanks,
>> Vladimir
>