[8u60] backport (S) 8080012: JVM times out with vdbench on SPARC M7-16

[Vladimir Kozlov]

Thank you, Igor. Looks like Poonam is pushing it already. So everything is good.

Thanks,
Vladimir

On 7/6/15 12:09 PM, Igor Veresov wrote:
> Good. Thanks!
>
> igor
>
>> On Jul 6, 2015, at 11:59 AM, Vladimir Kozlov <vladimir.kozlov at oracle.com> wrote:
>>
>> I would like to backport this to 8u60 (through 8u).  Patch was applied cleanly. Backport was approved by release team.
>>
>> https://bugs.openjdk.java.net/browse/JDK-8080012
>> jdk9 webrev: http://cr.openjdk.java.net/~kvn/8080012/webrev/
>>
>> On big SPARC machines (>1k cores) request for cacheline in PICL takes a lot of time since we asking it for each core. PICL daemon can't handle such stream of requests especially when several JVMs start at the same time (vdbench test).
>>
>> We were told that on sun4v machines (SPARC-T and -M series) you can't have different chips with different cache line size. So we can ask only one core.
>>
>> Thanks,
>> Vladimir
>