[9] RFR (XS): loadUB2L_immI8 & loadUS2L_immI16 rules don't match some 8-bit/16-bit masks

[Dean Long]

You should be able to use right_n_bits on x86 too, to allow the smaller 
encoding with an 8 bit immediate instead of 32.

Also, for this on sparc

5791     __ set($mask$$constant, Rtmp);

I believe

   __ set(right_n_bits($mask$$constant, 16), Rtmp)

will give the same result in fewer instructions.

dl

On 5/27/2015 11:19 AM, Vladimir Ivanov wrote:
> Vladimir, Dean, thanks for the feedback.
>
> I like right_n_bits trick.
> Here's an updated webrev:
>   http://cr.openjdk.java.net/~vlivanov/8001622/webrev.02
>
> Got rid of immU16 since set can encode 32-bit constants.
>
> Best regards,
> Vladimir Ivanov
>
> On 5/23/15 7:49 AM, Dean Long wrote:
>> Isn't this what you want:
>>
>> 5656 // Load Unsigned Byte (8 bit UNsigned) with 32-bit mask into Long
>> Register
>> 5657 instruct loadUB2L_immI(iRegL dst, memory mem, immI mask) %{
>> 5658   match(Set dst (ConvI2L (AndI (LoadUB mem) mask)));
>> 5659   ins_cost(MEMORY_REF_COST + DEFAULT_COST);
>> 5660
>> 5661   size(2*4);
>> 5662   format %{ "LDUB   $mem,$dst\t# ubyte & 32-bit mask -> long\n\t"
>> 5663             "AND    $dst,right_n_bits($mask, 8),$dst" %}
>> 5664   ins_encode %{
>> 5665     __ ldub($mem$$Address, $dst$$Register);
>> 5666     __ and3($dst$$Register, right_n_bits($mask$$constant, 8),
>> $dst$$Register);
>> 5667   %}
>> 5668   ins_pipe(iload_mem);
>> 5669 %}
>>
>> dl
>>
>> On 5/22/2015 8:38 AM, Vladimir Ivanov wrote:
>>> Updated webrev:
>>>   http://cr.openjdk.java.net/~vlivanov/8001622/webrev.01
>>>
>>> Introduced immU8/immU16 operands on sparc.
>>>
>>> As a cleanup, sorted immI/immU operand declarations.
>>>
>>> Best regards,
>>> Vladimir Ivanov
>>>
>>> On 5/22/15 6:14 PM, Vladimir Ivanov wrote:
>>>> Thanks for looking into the fix, Roland.
>>>>
>>>> On 5/22/15 5:57 PM, Roland Westrelin wrote:
>>>>>> http://cr.openjdk.java.net/~vlivanov/8001622/webrev.00
>>>>>> https://bugs.openjdk.java.net/browse/JDK-8001622
>>>>>>
>>>>>> Mask in loadUB2L_immI8 & loadUS2L_immI16 can be relaxed from
>>>>>> immI8/immI16 to immI, since zero-extending move is used.
>>>>>
>>>>> The change on sparc doesn’t look good:
>>>>> __ and3($dst$$Register, $mask$$constant, $dst$$Register);
>>>>>
>>>>> the and instruction cannot encode arbitrary large integer constants.
>>>> Good catch. I missed that it is and3.
>>>>
>>>>> Isn’t the root of the problem that we want an unsigned 8 bit integer
>>>>> and not a signed one?
>>>> Yes, unsigned 8-bit integer work fine, but it can be generalized to
>>>> arbitrary masks as well.
>>>>
>>>> I experimented with new operand types (immU8, immU16), but it was more
>>>> code for no particular benefit. I can use them on sparc.
>>>>
>>>> Best regards,
>>>> Vladimir Ivanov
>>