RFR: 8144028: Use AArch64 bit-test instructions in C2

Edward Nevill edward.nevill at gmail.com
Wed Nov 25 17:11:26 UTC 2015


On Wed, 2015-11-25 at 17:03 +0000, Andrew Haley wrote:
> On 11/25/2015 04:56 PM, Edward Nevill wrote:
> > On Wed, 2015-11-25 at 15:49 +0000, Andrew Haley wrote:
> >> For some reason (oversight, I guess) we never got around to using the
> >> bit-testing AArch64 instructions in C2.  TBZ/TBNZ are quite nice in
> >> that they allow bit tests and branches (and tests for +ve/-ve) without
> >> hitting the condition codes.  TST sets the condition codes based on a
> >> set of bits in a register: it's an AND which throws the result away.
> >>
> >> http://cr.openjdk.java.net/~aph/8144028/
> >>
> > 
> > Looks fine. Small typo.
> > 
> > In cmpL_branch_sign and cmpI_branch_sign
> > 
> > +  format %{ "cb$cmp   $op1, $labl" %}
> > 
> > should be "tb$cmp ..."
> 
> That's not really a typo.  I thought "tblt" and "tbge" didn't make
> much sense.  AFAICS "cblt" looks okay, but I'm not sure:
> 
> 040 + 	ldrsbw  R12, R1, R13, #16 I2L	# byte
> 048   	cblt   R12, B30  P=0.000000 C=8345.000000

Yes. You are right. I mistakenly thought it was printing cbne/cbeq, but
I see the conditions are lt/ge.

Its fine as it is.

Regards,
Ed.




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