RFR 8134802 - LCM register pressure scheduling

[Vladimir Kozlov]

Main motivation for this work is reduce spills. Spill instructions could 
be still expensive even if a processor has good OOO execution.

We want to start on one platform first to find all problems before 
moving to others.

Thanks,
Vladimir

On 9/12/15 2:37 AM, Andrew Haley wrote:
> On 09/12/2015 04:58 AM, Vladimir Kozlov wrote:
>> I looked on performance data and for scimark.lu.large C2 time increase
>> significantly (~ 39%) while score did not improve (0,18%).
>> I can accept compilation time regression if it gives performance
>> improvement as crypto.aes. But otherwise we need to investigate why that
>> happens.
>
> Is there any intention to look at other processors?  x86-64 tends to
> be very aggressively out-of-order, which reduces the need for
> scheduling to reduce the effects of latency.  Of course I'm interested
> in AArch64, but it has more registers so tends to spill less; perhaps
> ARM-32 would be an interesting candidate.
>
> Andrew.
>