RFR: 8169901: AArch64: CompareAndExchange intrinsics clobber address register
Roman Kennke
rkennke at redhat.com
Thu Nov 17 18:26:14 UTC 2016
Am Donnerstag, den 17.11.2016, 17:50 +0000 schrieb Andrew Haley:
> On 17/11/16 17:44, Roman Kennke wrote:
> >
> > the various compareAndExchange intrinsics in aarch64.ad potentially
> > clobber the address register:
> >
> > ;; cmpxchg {
> > 0x0000007f88b5919c: ldxr w0, [x0]
> > 0x0000007f88b591a0: cmp w0, w2
> > 0x0000007f88b591a4: b.ne 0x0000007f88b591b0
> > 0x0000007f88b591a8: stlxr w8, w3, [x0]
> > 0x0000007f88b591ac: cbnz w8, 0x0000007f88b5919c
> > ;; } cmpxchg
> >
> > This is very bad because it's subsequently used (within the same
> > instruction) for the store-exclusive. It results in occasional
> > segfaults.
> >
> > The fix is to declare the result register TEMP_DEF, this ensures
> > that
> > it's distinct from address, newval and oldval. This also removes
> > the
> > need to pin the input registers, which, I presume, was an attempt
> > to
> > resolve this exact problem, but did not consider the address.
> >
> > http://cr.openjdk.java.net/~rkennke/aarch64-cae/webrev.00/
> >
> >
> > bug: https://bugs.openjdk.java.net/browse/JDK-8169901
> >
> > Tested by running jcstress (which segfaulted without this change).
>
> Looks OK. I guess you must have just struck lucky; I did a clean
> jcstress
> run an hour or so ago.
Not sure. Maybe I had an advantage because I ran with Shenandoah and
aggressive heuristics which probably pressured the register allocator?
> This comment is wrong, please adjust:
>
> 1 dnl Copyright (c) 2014, Red Hat Inc. All rights reserved. 21
> dnl
> 22 dnl
> 23 dnl Process this file with m4 aarch64_ad.m4 to generate the
> arithmetic
> 24 dnl and shift patterns patterns used in aarch64.ad.
Oops. :
http://cr.openjdk.java.net/~rkennke/aarch64-cae/webrev.01/
What's the process for getting it in?
- Do I need another review?
- Do I need an FC extension, and how do I get it?
- Can I commit myself or do I need a sponsor?
Roman
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