[aarch64-port-dev ] RFR(XXS): 8201185 - AARCH64: bfm instruction encoding hits assert on zero register

[Dmitrij Pochepko]

Hi,

You're noticed right. It is case of bfc, which is alias of bfm in case 
source register is zr. And now we can use it, since encoding is fixed.

Thanks,
Dmitrij

On 05.04.2018 20:02, White, Derek wrote:
> Hi Dmitrij,
>
> Looks good. Does this allow the equivalent of BFC instruction (Bitfield Clear)?
>
> - Derek
>
>> -----Original Message-----
>> From: hotspot-compiler-dev [mailto:hotspot-compiler-dev-
>> bounces at openjdk.java.net] On Behalf Of Dmitrij Pochepko
>> Sent: Thursday, April 05, 2018 12:08 PM
>> To: Andrew Haley <aph at redhat.com>; hotspot-compiler-
>> dev at openjdk.java.net; aarch64-port-dev at openjdk.java.net
>> Subject: Re: [aarch64-port-dev ] RFR(XXS): 8201185 - AARCH64: bfm
>> instruction encoding hits assert on zero register
>>
>> Thank you for review.
>>
>>
>> On 05.04.2018 18:38, Andrew Haley wrote:
>>> On 04/05/2018 04:34 PM, Dmitrij Pochepko wrote:
>>>> please review small fix for  8201185 - AARCH64: bfm instruction
>>>> encoding hits assert on zero register
>>>>
>>>> bfm* instuctions encoding hits assert when using zero register as
>>>> source, which should be allowed.
>>>>
>>>> Fix is trivial: change "general register encoding" call (rf) to
>>>> "zero-or-general register encoding" call (zrf).
>>>>
>>>>
>>>> CR: https://bugs.openjdk.java.net/browse/JDK-8201185
>>>>
>>>> webrev: http://cr.openjdk.java.net/~dpochepk/8201185/webrev.01/
>>>>
>>>>
>>>> I've checked this patch (and actually found this bug) by creating
>>>> intrinsic with such encoding usage.
>>> Ooh, clever.  I never thought anyone would to that.  OK.
>>>